0001 Atmel system registers
0002
0003 Chipid required properties:
0004 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
0005 - reg : Should contain registers location and length
0006
0007 PIT Timer required properties:
0008 - compatible: Should be "atmel,at91sam9260-pit"
0009 - reg: Should contain registers location and length
0010 - interrupts: Should contain interrupt for the PIT which is the IRQ line
0011 shared across all System Controller members.
0012
0013 PIT64B Timer required properties:
0014 - compatible: Should be "microchip,sam9x60-pit64b"
0015 - reg: Should contain registers location and length
0016 - interrupts: Should contain interrupt for PIT64B timer
0017 - clocks: Should contain the available clock sources for PIT64B timer.
0018
0019 System Timer (ST) required properties:
0020 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
0021 - reg: Should contain registers location and length
0022 - interrupts: Should contain interrupt for the ST which is the IRQ line
0023 shared across all System Controller members.
0024 - clocks: phandle to input clock.
0025 Its subnodes can be:
0026 - watchdog: compatible should be "atmel,at91rm9200-wdt"
0027
0028 RAMC SDRAM/DDR Controller required properties:
0029 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
0030 "atmel,at91sam9260-sdramc",
0031 "atmel,at91sam9g45-ddramc",
0032 "atmel,sama5d3-ddramc",
0033 "microchip,sam9x60-ddramc",
0034 "microchip,sama7g5-uddrc"
0035 - reg: Should contain registers location and length
0036
0037 Examples:
0038
0039 ramc0: ramc@ffffe800 {
0040 compatible = "atmel,at91sam9g45-ddramc";
0041 reg = <0xffffe800 0x200>;
0042 };
0043
0044 RAMC PHY Controller required properties:
0045 - compatible: Should be "microchip,sama7g5-ddr3phy", "syscon"
0046 - reg: Should contain registers location and length
0047
0048 Example:
0049
0050 ddr3phy: ddr3phy@e3804000 {
0051 compatible = "microchip,sama7g5-ddr3phy", "syscon";
0052 reg = <0xe3804000 0x1000>;
0053 };
0054
0055 SHDWC Shutdown Controller
0056
0057 required properties:
0058 - compatible: Should be "atmel,<chip>-shdwc".
0059 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
0060 - reg: Should contain registers location and length
0061 - clocks: phandle to input clock.
0062
0063 optional properties:
0064 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
0065 Supported values are: "none", "high", "low", "any".
0066 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
0067
0068 optional at91sam9260 properties:
0069 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
0070
0071 optional at91sam9rl properties:
0072 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
0073 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
0074
0075 optional at91sam9x5 properties:
0076 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
0077
0078 Example:
0079
0080 shdwc@fffffd10 {
0081 compatible = "atmel,at91sam9260-shdwc";
0082 reg = <0xfffffd10 0x10>;
0083 clocks = <&clk32k>;
0084 };
0085
0086 SHDWC SAMA5D2-Compatible Shutdown Controller
0087
0088 1) shdwc node
0089
0090 required properties:
0091 - compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
0092 "microchip,sama7g5-shdwc"
0093 - reg: should contain registers location and length
0094 - clocks: phandle to input clock.
0095 - #address-cells: should be one. The cell is the wake-up input index.
0096 - #size-cells: should be zero.
0097
0098 optional properties:
0099
0100 - debounce-delay-us: minimum wake-up inputs debouncer period in
0101 microseconds. It's usually a board-related property.
0102 - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
0103
0104 optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
0105 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
0106
0107 The node contains child nodes for each wake-up input that the platform uses.
0108
0109 2) input nodes
0110
0111 Wake-up input nodes are usually described in the "board" part of the Device
0112 Tree. Note also that input 0 is linked to the wake-up pin and is frequently
0113 used.
0114
0115 Required properties:
0116 - reg: should contain the wake-up input index [0 - 15].
0117
0118 Optional properties:
0119 - atmel,wakeup-active-high: boolean, the corresponding wake-up input described
0120 by the child, forces the wake-up of the core power supply on a high level.
0121 The default is to be active low.
0122
0123 Example:
0124
0125 On the SoC side:
0126 shdwc@f8048010 {
0127 compatible = "atmel,sama5d2-shdwc";
0128 reg = <0xf8048010 0x10>;
0129 clocks = <&clk32k>;
0130 #address-cells = <1>;
0131 #size-cells = <0>;
0132 atmel,wakeup-rtc-timer;
0133 };
0134
0135 On the board side:
0136 shdwc@f8048010 {
0137 debounce-delay-us = <976>;
0138
0139 input@0 {
0140 reg = <0>;
0141 };
0142
0143 input@1 {
0144 reg = <1>;
0145 atmel,wakeup-active-high;
0146 };
0147 };
0148
0149 Special Function Registers (SFR)
0150
0151 Special Function Registers (SFR) manage specific aspects of the integrated
0152 memory, bridge implementations, processor and other functionality not controlled
0153 elsewhere.
0154
0155 required properties:
0156 - compatible: Should be "atmel,<chip>-sfr", "syscon" or
0157 "atmel,<chip>-sfrbu", "syscon"
0158 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
0159 It also can be "microchip,sam9x60-sfr", "syscon".
0160 - reg: Should contain registers location and length
0161
0162 sfr@f0038000 {
0163 compatible = "atmel,sama5d3-sfr", "syscon";
0164 reg = <0xf0038000 0x60>;
0165 };
0166
0167 Security Module (SECUMOD)
0168
0169 The Security Module macrocell provides all necessary secure functions to avoid
0170 voltage, temperature, frequency and mechanical attacks on the chip. It also
0171 embeds secure memories that can be scrambled.
0172
0173 The Security Module also offers the PIOBU pins which can be used as GPIO pins.
0174 Note that they maintain their voltage during Backup/Self-refresh.
0175
0176 required properties:
0177 - compatible: Should be "atmel,<chip>-secumod", "syscon".
0178 <chip> can be "sama5d2".
0179 - reg: Should contain registers location and length
0180 - gpio-controller: Marks the port as GPIO controller.
0181 - #gpio-cells: There are 2. The pin number is the
0182 first, the second represents additional
0183 parameters such as GPIO_ACTIVE_HIGH/LOW.
0184
0185
0186 secumod@fc040000 {
0187 compatible = "atmel,sama5d2-secumod", "syscon";
0188 reg = <0xfc040000 0x100>;
0189 gpio-controller;
0190 #gpio-cells = <2>;
0191 };