0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: ARM Versatile Express and Juno Boards Device Tree Bindings
0008
0009 maintainers:
0010 - Sudeep Holla <sudeep.holla@arm.com>
0011 - Linus Walleij <linus.walleij@linaro.org>
0012
0013 description: |+
0014 ARM's Versatile Express platform were built as reference designs for exploring
0015 multicore Cortex-A class systems. The Versatile Express family contains both
0016 32 bit (Aarch32) and 64 bit (Aarch64) systems.
0017
0018 The board consist of a motherboard and one or more daughterboards (tiles). The
0019 motherboard provides a set of peripherals. Processor and RAM "live" on the
0020 tiles.
0021
0022 The motherboard and each core tile should be described by a separate Device
0023 Tree source file, with the tile's description including the motherboard file
0024 using an include directive. As the motherboard can be initialized in one of
0025 two different configurations ("memory maps"), care must be taken to include
0026 the correct one.
0027
0028 When a new generation of boards were introduced under the name "Juno", these
0029 shared to many common characteristics with the Versatile Express that the
0030 "arm,vexpress" compatible was retained in the root node, and these are
0031 included in this binding schema as well.
0032
0033 The root node indicates the CPU SoC on the core tile, and this
0034 is a daughterboard to the main motherboard. The name used in the compatible
0035 string shall match the name given in the core tile's technical reference
0036 manual, followed by "arm,vexpress" as an additional compatible value. If
0037 further subvariants are released of the core tile, even more fine-granular
0038 compatible strings with up to three compatible strings are used.
0039
0040 properties:
0041 $nodename:
0042 const: '/'
0043 compatible:
0044 oneOf:
0045 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
0046 in MPCore configuration in a test chip on the core tile. See ARM
0047 DUI 0448I. This was the first Versatile Express platform.
0048 items:
0049 - const: arm,vexpress,v2p-ca9
0050 - const: arm,vexpress
0051 - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
0052 in a test chip on the core tile. It is intended to evaluate NEON, FPU
0053 and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
0054 items:
0055 - const: arm,vexpress,v2p-ca5s
0056 - const: arm,vexpress
0057 - description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU
0058 cores in a MPCore configuration in a test chip on the core tile. See
0059 ARM DUI 0604F.
0060 items:
0061 - const: arm,vexpress,v2p-ca15
0062 - const: arm,vexpress
0063 - description: CoreTile Express A15x4 (V2P-CA15, HBI-0237A) has 4 Cortex
0064 A15 CPU cores in a test chip on the core tile. This is the first test
0065 chip called "TC1".
0066 items:
0067 - const: arm,vexpress,v2p-ca15,tc1
0068 - const: arm,vexpress,v2p-ca15
0069 - const: arm,vexpress
0070 - description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15
0071 CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
0072 in a test chip on the core tile. See ARM DDI 0503I.
0073 items:
0074 - const: arm,vexpress,v2p-ca15_a7
0075 - const: arm,vexpress
0076 - description: LogicTile Express 20MG (V2F-1XV7) has 2 Cortex A53 CPU
0077 cores in a test chip on the core tile. See ARM DDI 0498D.
0078 items:
0079 - const: arm,vexpress,v2f-1xv7,ca53x2
0080 - const: arm,vexpress,v2f-1xv7
0081 - const: arm,vexpress
0082 - description: Arm Versatile Express Juno "r0" (the first Juno board,
0083 V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on
0084 AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53
0085 cores in a big.LITTLE configuration. It also features the MALI T624
0086 GPU. See ARM document 100113_0000_07_en.
0087 items:
0088 - const: arm,juno
0089 - const: arm,vexpress
0090 - description: Arm Versatile Express Juno r1 Development Platform
0091 (V2M-Juno r1) was introduced mainly aimed at development of PCIe
0092 based systems. Juno r1 also has support for AXI masters placed on
0093 the TLX connectors to join the coherency domain. Otherwise it is the
0094 same configuration as Juno r0. See ARM document 100122_0100_06_en.
0095 items:
0096 - const: arm,juno-r1
0097 - const: arm,juno
0098 - const: arm,vexpress
0099 - description: Arm Versatile Express Juno r2 Development Platform
0100 (V2M-Juno r2). It has the same feature set as Juno r0 and r1. See
0101 ARM document 100114_0200_04_en.
0102 items:
0103 - const: arm,juno-r2
0104 - const: arm,juno
0105 - const: arm,vexpress
0106 - description: Arm AEMv8a Versatile Express Real-Time System Model
0107 (VE RTSM) is a programmers view of the Versatile Express with Arm
0108 v8A hardware. See ARM DUI 0575D.
0109 items:
0110 - const: arm,rtsm_ve,aemv8a
0111 - const: arm,vexpress
0112 - description: Arm FVP (Fixed Virtual Platform) base model revision C
0113 See ARM Document 100964_1190_00_en.
0114 items:
0115 - const: arm,fvp-base-revc
0116 - const: arm,vexpress
0117 - description: Arm Foundation model for Aarch64
0118 items:
0119 - const: arm,foundation-aarch64
0120 - const: arm,vexpress
0121
0122 arm,vexpress,position:
0123 description: When daughterboards are stacked on one site, their position
0124 in the stack be be described this attribute.
0125 $ref: '/schemas/types.yaml#/definitions/uint32'
0126 minimum: 0
0127 maximum: 3
0128
0129 arm,vexpress,dcc:
0130 description: When describing tiles consisting of more than one DCC, its
0131 number can be specified with this attribute.
0132 $ref: '/schemas/types.yaml#/definitions/uint32'
0133 minimum: 0
0134 maximum: 3
0135
0136 patternProperties:
0137 "^bus@[0-9a-f]+$":
0138 description: Static Memory Bus (SMB) node, if this exists it describes
0139 the connection between the motherboard and any tiles. Sometimes the
0140 compatible is placed directly under this node, sometimes it is placed
0141 in a subnode named "motherboard-bus". Sometimes the compatible includes
0142 "arm,vexpress,v2?-p1" sometimes (on software models) is is just
0143 "simple-bus". If the compatible is placed in the "motherboard-bus" node,
0144 it is stricter and always has two compatibles.
0145 type: object
0146 $ref: '/schemas/simple-bus.yaml'
0147
0148 properties:
0149 compatible:
0150 oneOf:
0151 - items:
0152 - enum:
0153 - arm,vexpress,v2m-p1
0154 - arm,vexpress,v2p-p1
0155 - const: simple-bus
0156 - const: simple-bus
0157
0158 patternProperties:
0159 '^motherboard-bus@':
0160 type: object
0161 description: The motherboard description provides a single "motherboard"
0162 node using 2 address cells corresponding to the Static Memory Bus
0163 used between the motherboard and the tile. The first cell defines the
0164 Chip Select (CS) line number, the second cell address offset within
0165 the CS. All interrupt lines between the motherboard and the tile
0166 are active high and are described using single cell.
0167 properties:
0168 "#address-cells":
0169 const: 2
0170 "#size-cells":
0171 const: 1
0172 ranges: true
0173
0174 compatible:
0175 items:
0176 - enum:
0177 - arm,vexpress,v2m-p1
0178 - arm,vexpress,v2p-p1
0179 - const: simple-bus
0180 arm,v2m-memory-map:
0181 description: This describes the memory map type.
0182 $ref: '/schemas/types.yaml#/definitions/string'
0183 enum:
0184 - rs1
0185 - rs2
0186
0187 arm,hbi:
0188 $ref: '/schemas/types.yaml#/definitions/uint32'
0189 description: This indicates the ARM HBI (Hardware Board ID), this is
0190 ARM's unique board model ID, visible on the PCB's silkscreen.
0191
0192 arm,vexpress,site:
0193 description: As Versatile Express can be configured in number of physically
0194 different setups, the device tree should describe platform topology.
0195 For this reason the root node and main motherboard node must define this
0196 property, describing the physical location of the children nodes.
0197 0 means motherboard site, while 1 and 2 are daughterboard sites, and
0198 0xf means "sisterboard" which is the site containing the main CPU tile.
0199 $ref: '/schemas/types.yaml#/definitions/uint32'
0200 minimum: 0
0201 maximum: 15
0202
0203 required:
0204 - compatible
0205
0206 additionalProperties:
0207 type: object
0208
0209 required:
0210 - compatible
0211
0212 allOf:
0213 - if:
0214 properties:
0215 compatible:
0216 contains:
0217 enum:
0218 - arm,vexpress,v2p-ca9
0219 - arm,vexpress,v2p-ca5s
0220 - arm,vexpress,v2p-ca15
0221 - arm,vexpress,v2p-ca15_a7
0222 - arm,vexpress,v2f-1xv7,ca53x2
0223 then:
0224 required:
0225 - arm,hbi
0226
0227 additionalProperties: true
0228
0229 ...
