Back to home page

OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
0002 # Copyright 2021, Arm Ltd
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007 
0008 title: ARM Trace Buffer Extensions
0009 
0010 maintainers:
0011   - Anshuman Khandual <anshuman.khandual@arm.com>
0012 
0013 description: |
0014   Arm Trace Buffer Extension (TRBE) is a per CPU component
0015   for storing trace generated on the CPU to memory. It is
0016   accessed via CPU system registers. The software can verify
0017   if it is permitted to use the component by checking the
0018   TRBIDR register.
0019 
0020 properties:
0021   $nodename:
0022     const: "trbe"
0023   compatible:
0024     items:
0025       - const: arm,trace-buffer-extension
0026 
0027   interrupts:
0028     description: |
0029        Exactly 1 PPI must be listed. For heterogeneous systems where
0030        TRBE is only supported on a subset of the CPUs, please consult
0031        the arm,gic-v3 binding for details on describing a PPI partition.
0032     maxItems: 1
0033 
0034 required:
0035   - compatible
0036   - interrupts
0037 
0038 additionalProperties: false
0039 
0040 examples:
0041 
0042   - |
0043    #include <dt-bindings/interrupt-controller/arm-gic.h>
0044 
0045    trbe {
0046      compatible = "arm,trace-buffer-extension";
0047      interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
0048    };
0049 ...