0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/arm/arm,corstone1000.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: ARM Corstone1000 Device Tree Bindings
0008
0009 maintainers:
0010 - Vishnu Banavath <vishnu.banavath@arm.com>
0011 - Rui Miguel Silva <rui.silva@linaro.org>
0012
0013 description: |+
0014 ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that
0015 provides a flexible compute architecture that combines Cortex‑A and Cortex‑M
0016 processors.
0017
0018 Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion
0019 systems for M-Class (or other) processors for adding sensors, connectivity,
0020 video, audio and machine learning at the edge System and security IPs to build
0021 a secure SoC for a range of rich IoT applications, for example gateways, smart
0022 cameras and embedded systems.
0023
0024 Integrated Secure Enclave providing hardware Root of Trust and supporting
0025 seamless integration of the optional CryptoCell™-312 cryptographic
0026 accelerator.
0027
0028 properties:
0029 $nodename:
0030 const: '/'
0031 compatible:
0032 oneOf:
0033 - description: Corstone1000 MPS3 it has 1 Cortex-A35 CPU core in a FPGA
0034 implementation of the Corstone1000 in the MPS3 prototyping board. See
0035 ARM document DAI0550.
0036 items:
0037 - const: arm,corstone1000-mps3
0038 - description: Corstone1000 FVP is the Fixed Virtual Platform
0039 implementation of this system. See ARM ecosystems FVP's.
0040 items:
0041 - const: arm,corstone1000-fvp
0042
0043 additionalProperties: true
0044
0045 ...
