0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: CoreSight CPU Debug Component
0008
0009 maintainers:
0010 - Mathieu Poirier <mathieu.poirier@linaro.org>
0011 - Mike Leach <mike.leach@linaro.org>
0012 - Leo Yan <leo.yan@linaro.org>
0013 - Suzuki K Poulose <suzuki.poulose@arm.com>
0014
0015 description: |
0016 CoreSight CPU debug component are compliant with the ARMv8 architecture
0017 reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
0018 external debug module is mainly used for two modes: self-hosted debug and
0019 external debug, and it can be accessed from mmio region from Coresight and
0020 eventually the debug module connects with CPU for debugging. And the debug
0021 module provides sample-based profiling extension, which can be used to sample
0022 CPU program counter, secure state and exception level, etc; usually every CPU
0023 has one dedicated debug module to be connected.
0024
0025 select:
0026 properties:
0027 compatible:
0028 contains:
0029 const: arm,coresight-cpu-debug
0030 required:
0031 - compatible
0032
0033 allOf:
0034 - $ref: /schemas/arm/primecell.yaml#
0035
0036 properties:
0037 compatible:
0038 items:
0039 - const: arm,coresight-cpu-debug
0040 - const: arm,primecell
0041
0042 reg:
0043 maxItems: 1
0044
0045 clocks:
0046 maxItems: 1
0047
0048 clock-names:
0049 maxItems: 1
0050
0051 cpu:
0052 description:
0053 A phandle to the cpu this debug component is bound to.
0054 $ref: /schemas/types.yaml#/definitions/phandle
0055
0056 power-domains:
0057 maxItems: 1
0058 description:
0059 A phandle to the debug power domain if the debug logic has its own
0060 dedicated power domain. CPU idle states may also need to be separately
0061 constrained to keep CPU cores powered.
0062
0063 required:
0064 - compatible
0065 - reg
0066 - clocks
0067 - clock-names
0068 - cpu
0069
0070 unevaluatedProperties: false
0071
0072 examples:
0073 - |
0074 debug@f6590000 {
0075 compatible = "arm,coresight-cpu-debug", "arm,primecell";
0076 reg = <0xf6590000 0x1000>;
0077 clocks = <&sys_ctrl 1>;
0078 clock-names = "apb_pclk";
0079 cpu = <&cpu0>;
0080 };
0081 ...
