0001 ===================
0002 this_cpu operations
0003 ===================
0004
0005 :Author: Christoph Lameter, August 4th, 2014
0006 :Author: Pranith Kumar, Aug 2nd, 2014
0007
0008 this_cpu operations are a way of optimizing access to per cpu
0009 variables associated with the *currently* executing processor. This is
0010 done through the use of segment registers (or a dedicated register where
0011 the cpu permanently stored the beginning of the per cpu area for a
0012 specific processor).
0013
0014 this_cpu operations add a per cpu variable offset to the processor
0015 specific per cpu base and encode that operation in the instruction
0016 operating on the per cpu variable.
0017
0018 This means that there are no atomicity issues between the calculation of
0019 the offset and the operation on the data. Therefore it is not
0020 necessary to disable preemption or interrupts to ensure that the
0021 processor is not changed between the calculation of the address and
0022 the operation on the data.
0023
0024 Read-modify-write operations are of particular interest. Frequently
0025 processors have special lower latency instructions that can operate
0026 without the typical synchronization overhead, but still provide some
0027 sort of relaxed atomicity guarantees. The x86, for example, can execute
0028 RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
0029 lock prefix and the associated latency penalty.
0030
0031 Access to the variable without the lock prefix is not synchronized but
0032 synchronization is not necessary since we are dealing with per cpu
0033 data specific to the currently executing processor. Only the current
0034 processor should be accessing that variable and therefore there are no
0035 concurrency issues with other processors in the system.
0036
0037 Please note that accesses by remote processors to a per cpu area are
0038 exceptional situations and may impact performance and/or correctness
0039 (remote write operations) of local RMW operations via this_cpu_*.
0040
0041 The main use of the this_cpu operations has been to optimize counter
0042 operations.
0043
0044 The following this_cpu() operations with implied preemption protection
0045 are defined. These operations can be used without worrying about
0046 preemption and interrupts::
0047
0048 this_cpu_read(pcp)
0049 this_cpu_write(pcp, val)
0050 this_cpu_add(pcp, val)
0051 this_cpu_and(pcp, val)
0052 this_cpu_or(pcp, val)
0053 this_cpu_add_return(pcp, val)
0054 this_cpu_xchg(pcp, nval)
0055 this_cpu_cmpxchg(pcp, oval, nval)
0056 this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
0057 this_cpu_sub(pcp, val)
0058 this_cpu_inc(pcp)
0059 this_cpu_dec(pcp)
0060 this_cpu_sub_return(pcp, val)
0061 this_cpu_inc_return(pcp)
0062 this_cpu_dec_return(pcp)
0063
0064
0065 Inner working of this_cpu operations
0066 ------------------------------------
0067
0068 On x86 the fs: or the gs: segment registers contain the base of the
0069 per cpu area. It is then possible to simply use the segment override
0070 to relocate a per cpu relative address to the proper per cpu area for
0071 the processor. So the relocation to the per cpu base is encoded in the
0072 instruction via a segment register prefix.
0073
0074 For example::
0075
0076 DEFINE_PER_CPU(int, x);
0077 int z;
0078
0079 z = this_cpu_read(x);
0080
0081 results in a single instruction::
0082
0083 mov ax, gs:[x]
0084
0085 instead of a sequence of calculation of the address and then a fetch
0086 from that address which occurs with the per cpu operations. Before
0087 this_cpu_ops such sequence also required preempt disable/enable to
0088 prevent the kernel from moving the thread to a different processor
0089 while the calculation is performed.
0090
0091 Consider the following this_cpu operation::
0092
0093 this_cpu_inc(x)
0094
0095 The above results in the following single instruction (no lock prefix!)::
0096
0097 inc gs:[x]
0098
0099 instead of the following operations required if there is no segment
0100 register::
0101
0102 int *y;
0103 int cpu;
0104
0105 cpu = get_cpu();
0106 y = per_cpu_ptr(&x, cpu);
0107 (*y)++;
0108 put_cpu();
0109
0110 Note that these operations can only be used on per cpu data that is
0111 reserved for a specific processor. Without disabling preemption in the
0112 surrounding code this_cpu_inc() will only guarantee that one of the
0113 per cpu counters is correctly incremented. However, there is no
0114 guarantee that the OS will not move the process directly before or
0115 after the this_cpu instruction is executed. In general this means that
0116 the value of the individual counters for each processor are
0117 meaningless. The sum of all the per cpu counters is the only value
0118 that is of interest.
0119
0120 Per cpu variables are used for performance reasons. Bouncing cache
0121 lines can be avoided if multiple processors concurrently go through
0122 the same code paths. Since each processor has its own per cpu
0123 variables no concurrent cache line updates take place. The price that
0124 has to be paid for this optimization is the need to add up the per cpu
0125 counters when the value of a counter is needed.
0126
0127
0128 Special operations
0129 ------------------
0130
0131 ::
0132
0133 y = this_cpu_ptr(&x)
0134
0135 Takes the offset of a per cpu variable (&x !) and returns the address
0136 of the per cpu variable that belongs to the currently executing
0137 processor. this_cpu_ptr avoids multiple steps that the common
0138 get_cpu/put_cpu sequence requires. No processor number is
0139 available. Instead, the offset of the local per cpu area is simply
0140 added to the per cpu offset.
0141
0142 Note that this operation is usually used in a code segment when
0143 preemption has been disabled. The pointer is then used to
0144 access local per cpu data in a critical section. When preemption
0145 is re-enabled this pointer is usually no longer useful since it may
0146 no longer point to per cpu data of the current processor.
0147
0148
0149 Per cpu variables and offsets
0150 -----------------------------
0151
0152 Per cpu variables have *offsets* to the beginning of the per cpu
0153 area. They do not have addresses although they look like that in the
0154 code. Offsets cannot be directly dereferenced. The offset must be
0155 added to a base pointer of a per cpu area of a processor in order to
0156 form a valid address.
0157
0158 Therefore the use of x or &x outside of the context of per cpu
0159 operations is invalid and will generally be treated like a NULL
0160 pointer dereference.
0161
0162 ::
0163
0164 DEFINE_PER_CPU(int, x);
0165
0166 In the context of per cpu operations the above implies that x is a per
0167 cpu variable. Most this_cpu operations take a cpu variable.
0168
0169 ::
0170
0171 int __percpu *p = &x;
0172
0173 &x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
0174 takes the offset of a per cpu variable which makes this look a bit
0175 strange.
0176
0177
0178 Operations on a field of a per cpu structure
0179 --------------------------------------------
0180
0181 Let's say we have a percpu structure::
0182
0183 struct s {
0184 int n,m;
0185 };
0186
0187 DEFINE_PER_CPU(struct s, p);
0188
0189
0190 Operations on these fields are straightforward::
0191
0192 this_cpu_inc(p.m)
0193
0194 z = this_cpu_cmpxchg(p.m, 0, 1);
0195
0196
0197 If we have an offset to struct s::
0198
0199 struct s __percpu *ps = &p;
0200
0201 this_cpu_dec(ps->m);
0202
0203 z = this_cpu_inc_return(ps->n);
0204
0205
0206 The calculation of the pointer may require the use of this_cpu_ptr()
0207 if we do not make use of this_cpu ops later to manipulate fields::
0208
0209 struct s *pp;
0210
0211 pp = this_cpu_ptr(&p);
0212
0213 pp->m--;
0214
0215 z = pp->n++;
0216
0217
0218 Variants of this_cpu ops
0219 ------------------------
0220
0221 this_cpu ops are interrupt safe. Some architectures do not support
0222 these per cpu local operations. In that case the operation must be
0223 replaced by code that disables interrupts, then does the operations
0224 that are guaranteed to be atomic and then re-enable interrupts. Doing
0225 so is expensive. If there are other reasons why the scheduler cannot
0226 change the processor we are executing on then there is no reason to
0227 disable interrupts. For that purpose the following __this_cpu operations
0228 are provided.
0229
0230 These operations have no guarantee against concurrent interrupts or
0231 preemption. If a per cpu variable is not used in an interrupt context
0232 and the scheduler cannot preempt, then they are safe. If any interrupts
0233 still occur while an operation is in progress and if the interrupt too
0234 modifies the variable, then RMW actions can not be guaranteed to be
0235 safe::
0236
0237 __this_cpu_read(pcp)
0238 __this_cpu_write(pcp, val)
0239 __this_cpu_add(pcp, val)
0240 __this_cpu_and(pcp, val)
0241 __this_cpu_or(pcp, val)
0242 __this_cpu_add_return(pcp, val)
0243 __this_cpu_xchg(pcp, nval)
0244 __this_cpu_cmpxchg(pcp, oval, nval)
0245 __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
0246 __this_cpu_sub(pcp, val)
0247 __this_cpu_inc(pcp)
0248 __this_cpu_dec(pcp)
0249 __this_cpu_sub_return(pcp, val)
0250 __this_cpu_inc_return(pcp)
0251 __this_cpu_dec_return(pcp)
0252
0253
0254 Will increment x and will not fall-back to code that disables
0255 interrupts on platforms that cannot accomplish atomicity through
0256 address relocation and a Read-Modify-Write operation in the same
0257 instruction.
0258
0259
0260 &this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)
0261 --------------------------------------------
0262
0263 The first operation takes the offset and forms an address and then
0264 adds the offset of the n field. This may result in two add
0265 instructions emitted by the compiler.
0266
0267 The second one first adds the two offsets and then does the
0268 relocation. IMHO the second form looks cleaner and has an easier time
0269 with (). The second form also is consistent with the way
0270 this_cpu_read() and friends are used.
0271
0272
0273 Remote access to per cpu data
0274 ------------------------------
0275
0276 Per cpu data structures are designed to be used by one cpu exclusively.
0277 If you use the variables as intended, this_cpu_ops() are guaranteed to
0278 be "atomic" as no other CPU has access to these data structures.
0279
0280 There are special cases where you might need to access per cpu data
0281 structures remotely. It is usually safe to do a remote read access
0282 and that is frequently done to summarize counters. Remote write access
0283 something which could be problematic because this_cpu ops do not
0284 have lock semantics. A remote write may interfere with a this_cpu
0285 RMW operation.
0286
0287 Remote write accesses to percpu data structures are highly discouraged
0288 unless absolutely necessary. Please consider using an IPI to wake up
0289 the remote CPU and perform the update to its per cpu area.
0290
0291 To access per-cpu data structure remotely, typically the per_cpu_ptr()
0292 function is used::
0293
0294
0295 DEFINE_PER_CPU(struct data, datap);
0296
0297 struct data *p = per_cpu_ptr(&datap, cpu);
0298
0299 This makes it explicit that we are getting ready to access a percpu
0300 area remotely.
0301
0302 You can also do the following to convert the datap offset to an address::
0303
0304 struct data *p = this_cpu_ptr(&datap);
0305
0306 but, passing of pointers calculated via this_cpu_ptr to other cpus is
0307 unusual and should be avoided.
0308
0309 Remote access are typically only for reading the status of another cpus
0310 per cpu data. Write accesses can cause unique problems due to the
0311 relaxed synchronization requirements for this_cpu operations.
0312
0313 One example that illustrates some concerns with write operations is
0314 the following scenario that occurs because two per cpu variables
0315 share a cache-line but the relaxed synchronization is applied to
0316 only one process updating the cache-line.
0317
0318 Consider the following example::
0319
0320
0321 struct test {
0322 atomic_t a;
0323 int b;
0324 };
0325
0326 DEFINE_PER_CPU(struct test, onecacheline);
0327
0328 There is some concern about what would happen if the field 'a' is updated
0329 remotely from one processor and the local processor would use this_cpu ops
0330 to update field b. Care should be taken that such simultaneous accesses to
0331 data within the same cache line are avoided. Also costly synchronization
0332 may be necessary. IPIs are generally recommended in such scenarios instead
0333 of a remote write to the per cpu area of another processor.
0334
0335 Even in cases where the remote writes are rare, please bear in
0336 mind that a remote write will evict the cache line from the processor
0337 that most likely will access it. If the processor wakes up and finds a
0338 missing local cache line of a per cpu area, its performance and hence
0339 the wake up times will be affected.