0001 ==============
0002 DMA attributes
0003 ==============
0004
0005 This document describes the semantics of the DMA attributes that are
0006 defined in linux/dma-mapping.h.
0007
0008 DMA_ATTR_WEAK_ORDERING
0009 ----------------------
0010
0011 DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
0012 may be weakly ordered, that is that reads and writes may pass each other.
0013
0014 Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
0015 those that do not will simply ignore the attribute and exhibit default
0016 behavior.
0017
0018 DMA_ATTR_WRITE_COMBINE
0019 ----------------------
0020
0021 DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
0022 buffered to improve performance.
0023
0024 Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
0025 those that do not will simply ignore the attribute and exhibit default
0026 behavior.
0027
0028 DMA_ATTR_NO_KERNEL_MAPPING
0029 --------------------------
0030
0031 DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel
0032 virtual mapping for the allocated buffer. On some architectures creating
0033 such mapping is non-trivial task and consumes very limited resources
0034 (like kernel virtual address space or dma consistent address space).
0035 Buffers allocated with this attribute can be only passed to user space
0036 by calling dma_mmap_attrs(). By using this API, you are guaranteeing
0037 that you won't dereference the pointer returned by dma_alloc_attr(). You
0038 can treat it as a cookie that must be passed to dma_mmap_attrs() and
0039 dma_free_attrs(). Make sure that both of these also get this attribute
0040 set on each call.
0041
0042 Since it is optional for platforms to implement
0043 DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the
0044 attribute and exhibit default behavior.
0045
0046 DMA_ATTR_SKIP_CPU_SYNC
0047 ----------------------
0048
0049 By default dma_map_{single,page,sg} functions family transfer a given
0050 buffer from CPU domain to device domain. Some advanced use cases might
0051 require sharing a buffer between more than one device. This requires
0052 having a mapping created separately for each device and is usually
0053 performed by calling dma_map_{single,page,sg} function more than once
0054 for the given buffer with device pointer to each device taking part in
0055 the buffer sharing. The first call transfers a buffer from 'CPU' domain
0056 to 'device' domain, what synchronizes CPU caches for the given region
0057 (usually it means that the cache has been flushed or invalidated
0058 depending on the dma direction). However, next calls to
0059 dma_map_{single,page,sg}() for other devices will perform exactly the
0060 same synchronization operation on the CPU cache. CPU cache synchronization
0061 might be a time consuming operation, especially if the buffers are
0062 large, so it is highly recommended to avoid it if possible.
0063 DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of
0064 the CPU cache for the given buffer assuming that it has been already
0065 transferred to 'device' domain. This attribute can be also used for
0066 dma_unmap_{single,page,sg} functions family to force buffer to stay in
0067 device domain after releasing a mapping for it. Use this attribute with
0068 care!
0069
0070 DMA_ATTR_FORCE_CONTIGUOUS
0071 -------------------------
0072
0073 By default DMA-mapping subsystem is allowed to assemble the buffer
0074 allocated by dma_alloc_attrs() function from individual pages if it can
0075 be mapped as contiguous chunk into device dma address space. By
0076 specifying this attribute the allocated buffer is forced to be contiguous
0077 also in physical memory.
0078
0079 DMA_ATTR_ALLOC_SINGLE_PAGES
0080 ---------------------------
0081
0082 This is a hint to the DMA-mapping subsystem that it's probably not worth
0083 the time to try to allocate memory to in a way that gives better TLB
0084 efficiency (AKA it's not worth trying to build the mapping out of larger
0085 pages). You might want to specify this if:
0086
0087 - You know that the accesses to this memory won't thrash the TLB.
0088 You might know that the accesses are likely to be sequential or
0089 that they aren't sequential but it's unlikely you'll ping-pong
0090 between many addresses that are likely to be in different physical
0091 pages.
0092 - You know that the penalty of TLB misses while accessing the
0093 memory will be small enough to be inconsequential. If you are
0094 doing a heavy operation like decryption or decompression this
0095 might be the case.
0096 - You know that the DMA mapping is fairly transitory. If you expect
0097 the mapping to have a short lifetime then it may be worth it to
0098 optimize allocation (avoid coming up with large pages) instead of
0099 getting the slight performance win of larger pages.
0100
0101 Setting this hint doesn't guarantee that you won't get huge pages, but it
0102 means that we won't try quite as hard to get them.
0103
0104 .. note:: At the moment DMA_ATTR_ALLOC_SINGLE_PAGES is only implemented on ARM,
0105 though ARM64 patches will likely be posted soon.
0106
0107 DMA_ATTR_NO_WARN
0108 ----------------
0109
0110 This tells the DMA-mapping subsystem to suppress allocation failure reports
0111 (similarly to __GFP_NOWARN).
0112
0113 On some architectures allocation failures are reported with error messages
0114 to the system logs. Although this can help to identify and debug problems,
0115 drivers which handle failures (eg, retry later) have no problems with them,
0116 and can actually flood the system logs with error messages that aren't any
0117 problem at all, depending on the implementation of the retry mechanism.
0118
0119 So, this provides a way for drivers to avoid those error messages on calls
0120 where allocation failures are not a problem, and shouldn't bother the logs.
0121
0122 .. note:: At the moment DMA_ATTR_NO_WARN is only implemented on PowerPC.
0123
0124 DMA_ATTR_PRIVILEGED
0125 -------------------
0126
0127 Some advanced peripherals such as remote processors and GPUs perform
0128 accesses to DMA buffers in both privileged "supervisor" and unprivileged
0129 "user" modes. This attribute is used to indicate to the DMA-mapping
0130 subsystem that the buffer is fully accessible at the elevated privilege
0131 level (and ideally inaccessible or at least read-only at the
0132 lesser-privileged levels).