Back to home page

OSCL-LXR

 
 

    


0001 .. _elf_hwcaps_index:
0002 
0003 ================
0004 ARM64 ELF hwcaps
0005 ================
0006 
0007 This document describes the usage and semantics of the arm64 ELF hwcaps.
0008 
0009 
0010 1. Introduction
0011 ---------------
0012 
0013 Some hardware or software features are only available on some CPU
0014 implementations, and/or with certain kernel configurations, but have no
0015 architected discovery mechanism available to userspace code at EL0. The
0016 kernel exposes the presence of these features to userspace through a set
0017 of flags called hwcaps, exposed in the auxilliary vector.
0018 
0019 Userspace software can test for features by acquiring the AT_HWCAP or
0020 AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant
0021 flags are set, e.g.::
0022 
0023         bool floating_point_is_present(void)
0024         {
0025                 unsigned long hwcaps = getauxval(AT_HWCAP);
0026                 if (hwcaps & HWCAP_FP)
0027                         return true;
0028 
0029                 return false;
0030         }
0031 
0032 Where software relies on a feature described by a hwcap, it should check
0033 the relevant hwcap flag to verify that the feature is present before
0034 attempting to make use of the feature.
0035 
0036 Features cannot be probed reliably through other means. When a feature
0037 is not available, attempting to use it may result in unpredictable
0038 behaviour, and is not guaranteed to result in any reliable indication
0039 that the feature is unavailable, such as a SIGILL.
0040 
0041 
0042 2. Interpretation of hwcaps
0043 ---------------------------
0044 
0045 The majority of hwcaps are intended to indicate the presence of features
0046 which are described by architected ID registers inaccessible to
0047 userspace code at EL0. These hwcaps are defined in terms of ID register
0048 fields, and should be interpreted with reference to the definition of
0049 these fields in the ARM Architecture Reference Manual (ARM ARM).
0050 
0051 Such hwcaps are described below in the form::
0052 
0053     Functionality implied by idreg.field == val.
0054 
0055 Such hwcaps indicate the availability of functionality that the ARM ARM
0056 defines as being present when idreg.field has value val, but do not
0057 indicate that idreg.field is precisely equal to val, nor do they
0058 indicate the absence of functionality implied by other values of
0059 idreg.field.
0060 
0061 Other hwcaps may indicate the presence of features which cannot be
0062 described by ID registers alone. These may be described without
0063 reference to ID registers, and may refer to other documentation.
0064 
0065 
0066 3. The hwcaps exposed in AT_HWCAP
0067 ---------------------------------
0068 
0069 HWCAP_FP
0070     Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000.
0071 
0072 HWCAP_ASIMD
0073     Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000.
0074 
0075 HWCAP_EVTSTRM
0076     The generic timer is configured to generate events at a frequency of
0077     approximately 10KHz.
0078 
0079 HWCAP_AES
0080     Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.
0081 
0082 HWCAP_PMULL
0083     Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.
0084 
0085 HWCAP_SHA1
0086     Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001.
0087 
0088 HWCAP_SHA2
0089     Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0001.
0090 
0091 HWCAP_CRC32
0092     Functionality implied by ID_AA64ISAR0_EL1.CRC32 == 0b0001.
0093 
0094 HWCAP_ATOMICS
0095     Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0010.
0096 
0097 HWCAP_FPHP
0098     Functionality implied by ID_AA64PFR0_EL1.FP == 0b0001.
0099 
0100 HWCAP_ASIMDHP
0101     Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0001.
0102 
0103 HWCAP_CPUID
0104     EL0 access to certain ID registers is available, to the extent
0105     described by Documentation/arm64/cpu-feature-registers.rst.
0106 
0107     These ID registers may imply the availability of features.
0108 
0109 HWCAP_ASIMDRDM
0110     Functionality implied by ID_AA64ISAR0_EL1.RDM == 0b0001.
0111 
0112 HWCAP_JSCVT
0113     Functionality implied by ID_AA64ISAR1_EL1.JSCVT == 0b0001.
0114 
0115 HWCAP_FCMA
0116     Functionality implied by ID_AA64ISAR1_EL1.FCMA == 0b0001.
0117 
0118 HWCAP_LRCPC
0119     Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001.
0120 
0121 HWCAP_DCPOP
0122     Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001.
0123 
0124 HWCAP_SHA3
0125     Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001.
0126 
0127 HWCAP_SM3
0128     Functionality implied by ID_AA64ISAR0_EL1.SM3 == 0b0001.
0129 
0130 HWCAP_SM4
0131     Functionality implied by ID_AA64ISAR0_EL1.SM4 == 0b0001.
0132 
0133 HWCAP_ASIMDDP
0134     Functionality implied by ID_AA64ISAR0_EL1.DP == 0b0001.
0135 
0136 HWCAP_SHA512
0137     Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.
0138 
0139 HWCAP_SVE
0140     Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001.
0141 
0142 HWCAP_ASIMDFHM
0143    Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001.
0144 
0145 HWCAP_DIT
0146     Functionality implied by ID_AA64PFR0_EL1.DIT == 0b0001.
0147 
0148 HWCAP_USCAT
0149     Functionality implied by ID_AA64MMFR2_EL1.AT == 0b0001.
0150 
0151 HWCAP_ILRCPC
0152     Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.
0153 
0154 HWCAP_FLAGM
0155     Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.
0156 
0157 HWCAP_SSBS
0158     Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.
0159 
0160 HWCAP_SB
0161     Functionality implied by ID_AA64ISAR1_EL1.SB == 0b0001.
0162 
0163 HWCAP_PACA
0164     Functionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or
0165     ID_AA64ISAR1_EL1.API == 0b0001, as described by
0166     Documentation/arm64/pointer-authentication.rst.
0167 
0168 HWCAP_PACG
0169     Functionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or
0170     ID_AA64ISAR1_EL1.GPI == 0b0001, as described by
0171     Documentation/arm64/pointer-authentication.rst.
0172 
0173 HWCAP2_DCPODP
0174     Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
0175 
0176 HWCAP2_SVE2
0177     Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.
0178 
0179 HWCAP2_SVEAES
0180     Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.
0181 
0182 HWCAP2_SVEPMULL
0183     Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.
0184 
0185 HWCAP2_SVEBITPERM
0186     Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.
0187 
0188 HWCAP2_SVESHA3
0189     Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.
0190 
0191 HWCAP2_SVESM4
0192     Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.
0193 
0194 HWCAP2_FLAGM2
0195     Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.
0196 
0197 HWCAP2_FRINT
0198     Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.
0199 
0200 HWCAP2_SVEI8MM
0201     Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.
0202 
0203 HWCAP2_SVEF32MM
0204     Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.
0205 
0206 HWCAP2_SVEF64MM
0207     Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.
0208 
0209 HWCAP2_SVEBF16
0210     Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.
0211 
0212 HWCAP2_I8MM
0213     Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.
0214 
0215 HWCAP2_BF16
0216     Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001.
0217 
0218 HWCAP2_DGH
0219     Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001.
0220 
0221 HWCAP2_RNG
0222     Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.
0223 
0224 HWCAP2_BTI
0225     Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.
0226 
0227 HWCAP2_MTE
0228     Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described
0229     by Documentation/arm64/memory-tagging-extension.rst.
0230 
0231 HWCAP2_ECV
0232     Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.
0233 
0234 HWCAP2_AFP
0235     Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.
0236 
0237 HWCAP2_RPRES
0238     Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
0239 
0240 HWCAP2_MTE3
0241     Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described
0242     by Documentation/arm64/memory-tagging-extension.rst.
0243 
0244 HWCAP2_SME
0245     Functionality implied by ID_AA64PFR1_EL1.SME == 0b0001, as described
0246     by Documentation/arm64/sme.rst.
0247 
0248 HWCAP2_SME_I16I64
0249     Functionality implied by ID_AA64SMFR0_EL1.I16I64 == 0b1111.
0250 
0251 HWCAP2_SME_F64F64
0252     Functionality implied by ID_AA64SMFR0_EL1.F64F64 == 0b1.
0253 
0254 HWCAP2_SME_I8I32
0255     Functionality implied by ID_AA64SMFR0_EL1.I8I32 == 0b1111.
0256 
0257 HWCAP2_SME_F16F32
0258     Functionality implied by ID_AA64SMFR0_EL1.F16F32 == 0b1.
0259 
0260 HWCAP2_SME_B16F32
0261     Functionality implied by ID_AA64SMFR0_EL1.B16F32 == 0b1.
0262 
0263 HWCAP2_SME_F32F32
0264     Functionality implied by ID_AA64SMFR0_EL1.F32F32 == 0b1.
0265 
0266 HWCAP2_SME_FA64
0267     Functionality implied by ID_AA64SMFR0_EL1.FA64 == 0b1.
0268 
0269 HWCAP2_WFXT
0270     Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010.
0271 
0272 HWCAP2_EBF16
0273     Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.
0274 
0275 4. Unused AT_HWCAP bits
0276 -----------------------
0277 
0278 For interoperation with userspace, the kernel guarantees that bits 62
0279 and 63 of AT_HWCAP will always be returned as 0.