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0001 =======================
0002 S3C24XX Suspend Support
0003 =======================
0004 
0005 
0006 Introduction
0007 ------------
0008 
0009   The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
0010   in Self-Refresh mode, and all but the essential peripheral blocks are
0011   powered down. For more information on how this works, please look
0012   at the relevant CPU datasheet from Samsung.
0013 
0014 
0015 Requirements
0016 ------------
0017 
0018   1) A bootloader that can support the necessary resume operation
0019 
0020   2) Support for at least 1 source for resume
0021 
0022   3) CONFIG_PM enabled in the kernel
0023 
0024   4) Any peripherals that are going to be powered down at the same
0025      time require suspend/resume support.
0026 
0027 
0028 Resuming
0029 --------
0030 
0031   The S3C2410 user manual defines the process of sending the CPU to
0032   sleep and how it resumes. The default behaviour of the Linux code
0033   is to set the GSTATUS3 register to the physical address of the
0034   code to resume Linux operation.
0035 
0036   GSTATUS4 is currently left alone by the sleep code, and is free to
0037   use for any other purposes (for example, the EB2410ITX uses this to
0038   save memory configuration in).
0039 
0040 
0041 Machine Support
0042 ---------------
0043 
0044   The machine specific functions must call the s3c_pm_init() function
0045   to say that its bootloader is capable of resuming. This can be as
0046   simple as adding the following to the machine's definition:
0047 
0048   INITMACHINE(s3c_pm_init)
0049 
0050   A board can do its own setup before calling s3c_pm_init, if it
0051   needs to setup anything else for power management support.
0052 
0053   There is currently no support for over-riding the default method of
0054   saving the resume address, if your board requires it, then contact
0055   the maintainer and discuss what is required.
0056 
0057   Note, the original method of adding an late_initcall() is wrong,
0058   and will end up initialising all compiled machines' pm init!
0059 
0060   The following is an example of code used for testing wakeup from
0061   an falling edge on IRQ_EINT0::
0062 
0063 
0064     static irqreturn_t button_irq(int irq, void *pw)
0065     {
0066         return IRQ_HANDLED;
0067     }
0068 
0069     statuc void __init machine_init(void)
0070     {
0071         ...
0072 
0073         request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,
0074                    "button-irq-eint0", NULL);
0075 
0076         enable_irq_wake(IRQ_EINT0);
0077 
0078         s3c_pm_init();
0079     }
0080 
0081 
0082 Debugging
0083 ---------
0084 
0085   There are several important things to remember when using PM suspend:
0086 
0087   1) The uart drivers will disable the clocks to the UART blocks when
0088      suspending, which means that use of printascii() or similar direct
0089      access to the UARTs will cause the debug to stop.
0090 
0091   2) While the pm code itself will attempt to re-enable the UART clocks,
0092      care should be taken that any external clock sources that the UARTs
0093      rely on are still enabled at that point.
0094 
0095   3) If any debugging is placed in the resume path, then it must have the
0096      relevant clocks and peripherals setup before use (ie, bootloader).
0097 
0098      For example, if you transmit a character from the UART, the baud
0099      rate and uart controls must be setup beforehand.
0100 
0101 
0102 Configuration
0103 -------------
0104 
0105   The S3C2410 specific configuration in `System Type` defines various
0106   aspects of how the S3C2410 suspend and resume support is configured
0107 
0108   `S3C2410 PM Suspend debug`
0109 
0110     This option prints messages to the serial console before and after
0111     the actual suspend, giving detailed information on what is
0112     happening
0113 
0114 
0115   `S3C2410 PM Suspend Memory CRC`
0116 
0117     Allows the entire memory to be checksummed before and after the
0118     suspend to see if there has been any corruption of the contents.
0119 
0120     Note, the time to calculate the CRC is dependent on the CPU speed
0121     and the size of memory. For an 64Mbyte RAM area on an 200MHz
0122     S3C2410, this can take approximately 4 seconds to complete.
0123 
0124     This support requires the CRC32 function to be enabled.
0125 
0126 
0127   `S3C2410 PM Suspend CRC Chunksize (KiB)`
0128 
0129     Defines the size of memory each CRC chunk covers. A smaller value
0130     will mean that the CRC data block will take more memory, but will
0131     identify any faults with better precision
0132 
0133 
0134 Document Author
0135 ---------------
0136 
0137 Ben Dooks, Copyright 2004 Simtec Electronics