0001 iTLB multihit
0002 =============
0003
0004 iTLB multihit is an erratum where some processors may incur a machine check
0005 error, possibly resulting in an unrecoverable CPU lockup, when an
0006 instruction fetch hits multiple entries in the instruction TLB. This can
0007 occur when the page size is changed along with either the physical address
0008 or cache type. A malicious guest running on a virtualized system can
0009 exploit this erratum to perform a denial of service attack.
0010
0011
0012 Affected processors
0013 -------------------
0014
0015 Variations of this erratum are present on most Intel Core and Xeon processor
0016 models. The erratum is not present on:
0017
0018 - non-Intel processors
0019
0020 - Some Atoms (Airmont, Bonnell, Goldmont, GoldmontPlus, Saltwell, Silvermont)
0021
0022 - Intel processors that have the PSCHANGE_MC_NO bit set in the
0023 IA32_ARCH_CAPABILITIES MSR.
0024
0025
0026 Related CVEs
0027 ------------
0028
0029 The following CVE entry is related to this issue:
0030
0031 ============== =================================================
0032 CVE-2018-12207 Machine Check Error Avoidance on Page Size Change
0033 ============== =================================================
0034
0035
0036 Problem
0037 -------
0038
0039 Privileged software, including OS and virtual machine managers (VMM), are in
0040 charge of memory management. A key component in memory management is the control
0041 of the page tables. Modern processors use virtual memory, a technique that creates
0042 the illusion of a very large memory for processors. This virtual space is split
0043 into pages of a given size. Page tables translate virtual addresses to physical
0044 addresses.
0045
0046 To reduce latency when performing a virtual to physical address translation,
0047 processors include a structure, called TLB, that caches recent translations.
0048 There are separate TLBs for instruction (iTLB) and data (dTLB).
0049
0050 Under this errata, instructions are fetched from a linear address translated
0051 using a 4 KB translation cached in the iTLB. Privileged software modifies the
0052 paging structure so that the same linear address using large page size (2 MB, 4
0053 MB, 1 GB) with a different physical address or memory type. After the page
0054 structure modification but before the software invalidates any iTLB entries for
0055 the linear address, a code fetch that happens on the same linear address may
0056 cause a machine-check error which can result in a system hang or shutdown.
0057
0058
0059 Attack scenarios
0060 ----------------
0061
0062 Attacks against the iTLB multihit erratum can be mounted from malicious
0063 guests in a virtualized system.
0064
0065
0066 iTLB multihit system information
0067 --------------------------------
0068
0069 The Linux kernel provides a sysfs interface to enumerate the current iTLB
0070 multihit status of the system:whether the system is vulnerable and which
0071 mitigations are active. The relevant sysfs file is:
0072
0073 /sys/devices/system/cpu/vulnerabilities/itlb_multihit
0074
0075 The possible values in this file are:
0076
0077 .. list-table::
0078
0079 * - Not affected
0080 - The processor is not vulnerable.
0081 * - KVM: Mitigation: Split huge pages
0082 - Software changes mitigate this issue.
0083 * - KVM: Mitigation: VMX unsupported
0084 - KVM is not vulnerable because Virtual Machine Extensions (VMX) is not supported.
0085 * - KVM: Mitigation: VMX disabled
0086 - KVM is not vulnerable because Virtual Machine Extensions (VMX) is disabled.
0087 * - KVM: Vulnerable
0088 - The processor is vulnerable, but no mitigation enabled
0089
0090
0091 Enumeration of the erratum
0092 --------------------------------
0093
0094 A new bit has been allocated in the IA32_ARCH_CAPABILITIES (PSCHANGE_MC_NO) msr
0095 and will be set on CPU's which are mitigated against this issue.
0096
0097 ======================================= =========== ===============================
0098 IA32_ARCH_CAPABILITIES MSR Not present Possibly vulnerable,check model
0099 IA32_ARCH_CAPABILITIES[PSCHANGE_MC_NO] '0' Likely vulnerable,check model
0100 IA32_ARCH_CAPABILITIES[PSCHANGE_MC_NO] '1' Not vulnerable
0101 ======================================= =========== ===============================
0102
0103
0104 Mitigation mechanism
0105 -------------------------
0106
0107 This erratum can be mitigated by restricting the use of large page sizes to
0108 non-executable pages. This forces all iTLB entries to be 4K, and removes
0109 the possibility of multiple hits.
0110
0111 In order to mitigate the vulnerability, KVM initially marks all huge pages
0112 as non-executable. If the guest attempts to execute in one of those pages,
0113 the page is broken down into 4K pages, which are then marked executable.
0114
0115 If EPT is disabled or not available on the host, KVM is in control of TLB
0116 flushes and the problematic situation cannot happen. However, the shadow
0117 EPT paging mechanism used by nested virtualization is vulnerable, because
0118 the nested guest can trigger multiple iTLB hits by modifying its own
0119 (non-nested) page tables. For simplicity, KVM will make large pages
0120 non-executable in all shadow paging modes.
0121
0122 Mitigation control on the kernel command line and KVM - module parameter
0123 ------------------------------------------------------------------------
0124
0125 The KVM hypervisor mitigation mechanism for marking huge pages as
0126 non-executable can be controlled with a module parameter "nx_huge_pages=".
0127 The kernel command line allows to control the iTLB multihit mitigations at
0128 boot time with the option "kvm.nx_huge_pages=".
0129
0130 The valid arguments for these options are:
0131
0132 ========== ================================================================
0133 force Mitigation is enabled. In this case, the mitigation implements
0134 non-executable huge pages in Linux kernel KVM module. All huge
0135 pages in the EPT are marked as non-executable.
0136 If a guest attempts to execute in one of those pages, the page is
0137 broken down into 4K pages, which are then marked executable.
0138
0139 off Mitigation is disabled.
0140
0141 auto Enable mitigation only if the platform is affected and the kernel
0142 was not booted with the "mitigations=off" command line parameter.
0143 This is the default option.
0144 ========== ================================================================
0145
0146
0147 Mitigation selection guide
0148 --------------------------
0149
0150 1. No virtualization in use
0151 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
0152
0153 The system is protected by the kernel unconditionally and no further
0154 action is required.
0155
0156 2. Virtualization with trusted guests
0157 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
0158
0159 If the guest comes from a trusted source, you may assume that the guest will
0160 not attempt to maliciously exploit these errata and no further action is
0161 required.
0162
0163 3. Virtualization with untrusted guests
0164 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
0165 If the guest comes from an untrusted source, the guest host kernel will need
0166 to apply iTLB multihit mitigation via the kernel command line or kvm
0167 module parameter.
