0001 .. SPDX-License-Identifier: GPL-2.0
0002 .. include:: <isonum.txt>
0003
0004 ===========================================================
0005 The PCI Express Advanced Error Reporting Driver Guide HOWTO
0006 ===========================================================
0007
0008 :Authors: - T. Long Nguyen <tom.l.nguyen@intel.com>
0009 - Yanmin Zhang <yanmin.zhang@intel.com>
0010
0011 :Copyright: |copy| 2006 Intel Corporation
0012
0013 Overview
0014 ===========
0015
0016 About this guide
0017 ----------------
0018
0019 This guide describes the basics of the PCI Express Advanced Error
0020 Reporting (AER) driver and provides information on how to use it, as
0021 well as how to enable the drivers of endpoint devices to conform with
0022 PCI Express AER driver.
0023
0024
0025 What is the PCI Express AER Driver?
0026 -----------------------------------
0027
0028 PCI Express error signaling can occur on the PCI Express link itself
0029 or on behalf of transactions initiated on the link. PCI Express
0030 defines two error reporting paradigms: the baseline capability and
0031 the Advanced Error Reporting capability. The baseline capability is
0032 required of all PCI Express components providing a minimum defined
0033 set of error reporting requirements. Advanced Error Reporting
0034 capability is implemented with a PCI Express advanced error reporting
0035 extended capability structure providing more robust error reporting.
0036
0037 The PCI Express AER driver provides the infrastructure to support PCI
0038 Express Advanced Error Reporting capability. The PCI Express AER
0039 driver provides three basic functions:
0040
0041 - Gathers the comprehensive error information if errors occurred.
0042 - Reports error to the users.
0043 - Performs error recovery actions.
0044
0045 AER driver only attaches root ports which support PCI-Express AER
0046 capability.
0047
0048
0049 User Guide
0050 ==========
0051
0052 Include the PCI Express AER Root Driver into the Linux Kernel
0053 -------------------------------------------------------------
0054
0055 The PCI Express AER Root driver is a Root Port service driver attached
0056 to the PCI Express Port Bus driver. If a user wants to use it, the driver
0057 has to be compiled. Option CONFIG_PCIEAER supports this capability. It
0058 depends on CONFIG_PCIEPORTBUS, so pls. set CONFIG_PCIEPORTBUS=y and
0059 CONFIG_PCIEAER = y.
0060
0061 Load PCI Express AER Root Driver
0062 --------------------------------
0063
0064 Some systems have AER support in firmware. Enabling Linux AER support at
0065 the same time the firmware handles AER may result in unpredictable
0066 behavior. Therefore, Linux does not handle AER events unless the firmware
0067 grants AER control to the OS via the ACPI _OSC method. See the PCI FW 3.0
0068 Specification for details regarding _OSC usage.
0069
0070 AER error output
0071 ----------------
0072
0073 When a PCIe AER error is captured, an error message will be output to
0074 console. If it's a correctable error, it is output as a warning.
0075 Otherwise, it is printed as an error. So users could choose different
0076 log level to filter out correctable error messages.
0077
0078 Below shows an example::
0079
0080 0000:50:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, id=0500(Requester ID)
0081 0000:50:00.0: device [8086:0329] error status/mask=00100000/00000000
0082 0000:50:00.0: [20] Unsupported Request (First)
0083 0000:50:00.0: TLP Header: 04000001 00200a03 05010000 00050100
0084
0085 In the example, 'Requester ID' means the ID of the device who sends
0086 the error message to root port. Pls. refer to pci express specs for
0087 other fields.
0088
0089 AER Statistics / Counters
0090 -------------------------
0091
0092 When PCIe AER errors are captured, the counters / statistics are also exposed
0093 in the form of sysfs attributes which are documented at
0094 Documentation/ABI/testing/sysfs-bus-pci-devices-aer_stats
0095
0096 Developer Guide
0097 ===============
0098
0099 To enable AER aware support requires a software driver to configure
0100 the AER capability structure within its device and to provide callbacks.
0101
0102 To support AER better, developers need understand how AER does work
0103 firstly.
0104
0105 PCI Express errors are classified into two types: correctable errors
0106 and uncorrectable errors. This classification is based on the impacts
0107 of those errors, which may result in degraded performance or function
0108 failure.
0109
0110 Correctable errors pose no impacts on the functionality of the
0111 interface. The PCI Express protocol can recover without any software
0112 intervention or any loss of data. These errors are detected and
0113 corrected by hardware. Unlike correctable errors, uncorrectable
0114 errors impact functionality of the interface. Uncorrectable errors
0115 can cause a particular transaction or a particular PCI Express link
0116 to be unreliable. Depending on those error conditions, uncorrectable
0117 errors are further classified into non-fatal errors and fatal errors.
0118 Non-fatal errors cause the particular transaction to be unreliable,
0119 but the PCI Express link itself is fully functional. Fatal errors, on
0120 the other hand, cause the link to be unreliable.
0121
0122 When AER is enabled, a PCI Express device will automatically send an
0123 error message to the PCIe root port above it when the device captures
0124 an error. The Root Port, upon receiving an error reporting message,
0125 internally processes and logs the error message in its PCI Express
0126 capability structure. Error information being logged includes storing
0127 the error reporting agent's requestor ID into the Error Source
0128 Identification Registers and setting the error bits of the Root Error
0129 Status Register accordingly. If AER error reporting is enabled in Root
0130 Error Command Register, the Root Port generates an interrupt if an
0131 error is detected.
0132
0133 Note that the errors as described above are related to the PCI Express
0134 hierarchy and links. These errors do not include any device specific
0135 errors because device specific errors will still get sent directly to
0136 the device driver.
0137
0138 Configure the AER capability structure
0139 --------------------------------------
0140
0141 AER aware drivers of PCI Express component need change the device
0142 control registers to enable AER. They also could change AER registers,
0143 including mask and severity registers. Helper function
0144 pci_enable_pcie_error_reporting could be used to enable AER. See
0145 section 3.3.
0146
0147 Provide callbacks
0148 -----------------
0149
0150 callback reset_link to reset pci express link
0151 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0152
0153 This callback is used to reset the pci express physical link when a
0154 fatal error happens. The root port aer service driver provides a
0155 default reset_link function, but different upstream ports might
0156 have different specifications to reset pci express link, so all
0157 upstream ports should provide their own reset_link functions.
0158
0159 Section 3.2.2.2 provides more detailed info on when to call
0160 reset_link.
0161
0162 PCI error-recovery callbacks
0163 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0164
0165 The PCI Express AER Root driver uses error callbacks to coordinate
0166 with downstream device drivers associated with a hierarchy in question
0167 when performing error recovery actions.
0168
0169 Data struct pci_driver has a pointer, err_handler, to point to
0170 pci_error_handlers who consists of a couple of callback function
0171 pointers. AER driver follows the rules defined in
0172 pci-error-recovery.txt except pci express specific parts (e.g.
0173 reset_link). Pls. refer to pci-error-recovery.txt for detailed
0174 definitions of the callbacks.
0175
0176 Below sections specify when to call the error callback functions.
0177
0178 Correctable errors
0179 ~~~~~~~~~~~~~~~~~~
0180
0181 Correctable errors pose no impacts on the functionality of
0182 the interface. The PCI Express protocol can recover without any
0183 software intervention or any loss of data. These errors do not
0184 require any recovery actions. The AER driver clears the device's
0185 correctable error status register accordingly and logs these errors.
0186
0187 Non-correctable (non-fatal and fatal) errors
0188 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0189
0190 If an error message indicates a non-fatal error, performing link reset
0191 at upstream is not required. The AER driver calls error_detected(dev,
0192 pci_channel_io_normal) to all drivers associated within a hierarchy in
0193 question. for example::
0194
0195 EndPoint<==>DownstreamPort B<==>UpstreamPort A<==>RootPort
0196
0197 If Upstream port A captures an AER error, the hierarchy consists of
0198 Downstream port B and EndPoint.
0199
0200 A driver may return PCI_ERS_RESULT_CAN_RECOVER,
0201 PCI_ERS_RESULT_DISCONNECT, or PCI_ERS_RESULT_NEED_RESET, depending on
0202 whether it can recover or the AER driver calls mmio_enabled as next.
0203
0204 If an error message indicates a fatal error, kernel will broadcast
0205 error_detected(dev, pci_channel_io_frozen) to all drivers within
0206 a hierarchy in question. Then, performing link reset at upstream is
0207 necessary. As different kinds of devices might use different approaches
0208 to reset link, AER port service driver is required to provide the
0209 function to reset link via callback parameter of pcie_do_recovery()
0210 function. If reset_link is not NULL, recovery function will use it
0211 to reset the link. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER
0212 and reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes
0213 to mmio_enabled.
0214
0215 helper functions
0216 ----------------
0217 ::
0218
0219 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
0220
0221 pci_enable_pcie_error_reporting enables the device to send error
0222 messages to root port when an error is detected. Note that devices
0223 don't enable the error reporting by default, so device drivers need
0224 call this function to enable it.
0225
0226 ::
0227
0228 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
0229
0230 pci_disable_pcie_error_reporting disables the device to send error
0231 messages to root port when an error is detected.
0232
0233 ::
0234
0235 int pci_aer_clear_nonfatal_status(struct pci_dev *dev);`
0236
0237 pci_aer_clear_nonfatal_status clears non-fatal errors in the uncorrectable
0238 error status register.
0239
0240 Frequent Asked Questions
0241 ------------------------
0242
0243 Q:
0244 What happens if a PCI Express device driver does not provide an
0245 error recovery handler (pci_driver->err_handler is equal to NULL)?
0246
0247 A:
0248 The devices attached with the driver won't be recovered. If the
0249 error is fatal, kernel will print out warning messages. Please refer
0250 to section 3 for more information.
0251
0252 Q:
0253 What happens if an upstream port service driver does not provide
0254 callback reset_link?
0255
0256 A:
0257 Fatal error recovery will fail if the errors are reported by the
0258 upstream ports who are attached by the service driver.
0259
0260 Q:
0261 How does this infrastructure deal with driver that is not PCI
0262 Express aware?
0263
0264 A:
0265 This infrastructure calls the error callback functions of the
0266 driver when an error happens. But if the driver is not aware of
0267 PCI Express, the device might not report its own errors to root
0268 port.
0269
0270 Q:
0271 What modifications will that driver need to make it compatible
0272 with the PCI Express AER Root driver?
0273
0274 A:
0275 It could call the helper functions to enable AER in devices and
0276 cleanup uncorrectable status register. Pls. refer to section 3.3.
0277
0278
0279 Software error injection
0280 ========================
0281
0282 Debugging PCIe AER error recovery code is quite difficult because it
0283 is hard to trigger real hardware errors. Software based error
0284 injection can be used to fake various kinds of PCIe errors.
0285
0286 First you should enable PCIe AER software error injection in kernel
0287 configuration, that is, following item should be in your .config.
0288
0289 CONFIG_PCIEAER_INJECT=y or CONFIG_PCIEAER_INJECT=m
0290
0291 After reboot with new kernel or insert the module, a device file named
0292 /dev/aer_inject should be created.
0293
0294 Then, you need a user space tool named aer-inject, which can be gotten
0295 from:
0296
0297 https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
0298
0299 More information about aer-inject can be found in the document comes
0300 with its source code.