Back to home page

OSCL-LXR

 
 

    


0001 What:           /sys/devices/platform/<platform>/etr3
0002 Date:           Apr 2021
0003 KernelVersion:  5.13
0004 Contact:        "Tomas Winkler" <tomas.winkler@intel.com>
0005 Description:
0006                 The file exposes "Extended Test Mode Register 3" global
0007                 reset bits. The bits are used during an Intel platform
0008                 manufacturing process to indicate that consequent reset
0009                 of the platform is a "global reset". This type of reset
0010                 is required in order for manufacturing configurations
0011                 to take effect.
0012 
0013                 Display global reset setting bits for PMC.
0014 
0015                         * bit 31 - global reset is locked
0016                         * bit 20 - global reset is set
0017 
0018                 Writing bit 20 value to the etr3 will induce
0019                 a platform "global reset" upon consequent platform reset,
0020                 in case the register is not locked.
0021                 The "global reset bit" should be locked on a production
0022                 system and the file is in read-only mode.