0001 What: /sys/bus/cxl/flush
0002 Date: Januarry, 2022
0003 KernelVersion: v5.18
0004 Contact: linux-cxl@vger.kernel.org
0005 Description:
0006 (WO) If userspace manually unbinds a port the kernel schedules
0007 all descendant memdevs for unbind. Writing '1' to this attribute
0008 flushes that work.
0009
0010
0011 What: /sys/bus/cxl/devices/memX/firmware_version
0012 Date: December, 2020
0013 KernelVersion: v5.12
0014 Contact: linux-cxl@vger.kernel.org
0015 Description:
0016 (RO) "FW Revision" string as reported by the Identify
0017 Memory Device Output Payload in the CXL-2.0
0018 specification.
0019
0020
0021 What: /sys/bus/cxl/devices/memX/ram/size
0022 Date: December, 2020
0023 KernelVersion: v5.12
0024 Contact: linux-cxl@vger.kernel.org
0025 Description:
0026 (RO) "Volatile Only Capacity" as bytes. Represents the
0027 identically named field in the Identify Memory Device Output
0028 Payload in the CXL-2.0 specification.
0029
0030
0031 What: /sys/bus/cxl/devices/memX/pmem/size
0032 Date: December, 2020
0033 KernelVersion: v5.12
0034 Contact: linux-cxl@vger.kernel.org
0035 Description:
0036 (RO) "Persistent Only Capacity" as bytes. Represents the
0037 identically named field in the Identify Memory Device Output
0038 Payload in the CXL-2.0 specification.
0039
0040
0041 What: /sys/bus/cxl/devices/memX/serial
0042 Date: January, 2022
0043 KernelVersion: v5.18
0044 Contact: linux-cxl@vger.kernel.org
0045 Description:
0046 (RO) 64-bit serial number per the PCIe Device Serial Number
0047 capability. Mandatory for CXL devices, see CXL 2.0 8.1.12.2
0048 Memory Device PCIe Capabilities and Extended Capabilities.
0049
0050
0051 What: /sys/bus/cxl/devices/memX/numa_node
0052 Date: January, 2022
0053 KernelVersion: v5.18
0054 Contact: linux-cxl@vger.kernel.org
0055 Description:
0056 (RO) If NUMA is enabled and the platform has affinitized the
0057 host PCI device for this memory device, emit the CPU node
0058 affinity for this device.
0059
0060
0061 What: /sys/bus/cxl/devices/*/devtype
0062 Date: June, 2021
0063 KernelVersion: v5.14
0064 Contact: linux-cxl@vger.kernel.org
0065 Description:
0066 (RO) CXL device objects export the devtype attribute which
0067 mirrors the same value communicated in the DEVTYPE environment
0068 variable for uevents for devices on the "cxl" bus.
0069
0070
0071 What: /sys/bus/cxl/devices/*/modalias
0072 Date: December, 2021
0073 KernelVersion: v5.18
0074 Contact: linux-cxl@vger.kernel.org
0075 Description:
0076 (RO) CXL device objects export the modalias attribute which
0077 mirrors the same value communicated in the MODALIAS environment
0078 variable for uevents for devices on the "cxl" bus.
0079
0080
0081 What: /sys/bus/cxl/devices/portX/uport
0082 Date: June, 2021
0083 KernelVersion: v5.14
0084 Contact: linux-cxl@vger.kernel.org
0085 Description:
0086 (RO) CXL port objects are enumerated from either a platform
0087 firmware device (ACPI0017 and ACPI0016) or PCIe switch upstream
0088 port with CXL component registers. The 'uport' symlink connects
0089 the CXL portX object to the device that published the CXL port
0090 capability.
0091
0092
0093 What: /sys/bus/cxl/devices/portX/dportY
0094 Date: June, 2021
0095 KernelVersion: v5.14
0096 Contact: linux-cxl@vger.kernel.org
0097 Description:
0098 (RO) CXL port objects are enumerated from either a platform
0099 firmware device (ACPI0017 and ACPI0016) or PCIe switch upstream
0100 port with CXL component registers. The 'dportY' symlink
0101 identifies one or more downstream ports that the upstream port
0102 may target in its decode of CXL memory resources. The 'Y'
0103 integer reflects the hardware port unique-id used in the
0104 hardware decoder target list.
0105
0106
0107 What: /sys/bus/cxl/devices/decoderX.Y
0108 Date: June, 2021
0109 KernelVersion: v5.14
0110 Contact: linux-cxl@vger.kernel.org
0111 Description:
0112 (RO) CXL decoder objects are enumerated from either a platform
0113 firmware description, or a CXL HDM decoder register set in a
0114 PCIe device (see CXL 2.0 section 8.2.5.12 CXL HDM Decoder
0115 Capability Structure). The 'X' in decoderX.Y represents the
0116 cxl_port container of this decoder, and 'Y' represents the
0117 instance id of a given decoder resource.
0118
0119
0120 What: /sys/bus/cxl/devices/decoderX.Y/{start,size}
0121 Date: June, 2021
0122 KernelVersion: v5.14
0123 Contact: linux-cxl@vger.kernel.org
0124 Description:
0125 (RO) The 'start' and 'size' attributes together convey the
0126 physical address base and number of bytes mapped in the
0127 decoder's decode window. For decoders of devtype
0128 "cxl_decoder_root" the address range is fixed. For decoders of
0129 devtype "cxl_decoder_switch" the address is bounded by the
0130 decode range of the cxl_port ancestor of the decoder's cxl_port,
0131 and dynamically updates based on the active memory regions in
0132 that address space.
0133
0134
0135 What: /sys/bus/cxl/devices/decoderX.Y/locked
0136 Date: June, 2021
0137 KernelVersion: v5.14
0138 Contact: linux-cxl@vger.kernel.org
0139 Description:
0140 (RO) CXL HDM decoders have the capability to lock the
0141 configuration until the next device reset. For decoders of
0142 devtype "cxl_decoder_root" there is no standard facility to
0143 unlock them. For decoders of devtype "cxl_decoder_switch" a
0144 secondary bus reset, of the PCIe bridge that provides the bus
0145 for this decoders uport, unlocks / resets the decoder.
0146
0147
0148 What: /sys/bus/cxl/devices/decoderX.Y/target_list
0149 Date: June, 2021
0150 KernelVersion: v5.14
0151 Contact: linux-cxl@vger.kernel.org
0152 Description:
0153 (RO) Display a comma separated list of the current decoder
0154 target configuration. The list is ordered by the current
0155 configured interleave order of the decoder's dport instances.
0156 Each entry in the list is a dport id.
0157
0158
0159 What: /sys/bus/cxl/devices/decoderX.Y/cap_{pmem,ram,type2,type3}
0160 Date: June, 2021
0161 KernelVersion: v5.14
0162 Contact: linux-cxl@vger.kernel.org
0163 Description:
0164 (RO) When a CXL decoder is of devtype "cxl_decoder_root", it
0165 represents a fixed memory window identified by platform
0166 firmware. A fixed window may only support a subset of memory
0167 types. The 'cap_*' attributes indicate whether persistent
0168 memory, volatile memory, accelerator memory, and / or expander
0169 memory may be mapped behind this decoder's memory window.
0170
0171
0172 What: /sys/bus/cxl/devices/decoderX.Y/target_type
0173 Date: June, 2021
0174 KernelVersion: v5.14
0175 Contact: linux-cxl@vger.kernel.org
0176 Description:
0177 (RO) When a CXL decoder is of devtype "cxl_decoder_switch", it
0178 can optionally decode either accelerator memory (type-2) or
0179 expander memory (type-3). The 'target_type' attribute indicates
0180 the current setting which may dynamically change based on what
0181 memory regions are activated in this decode hierarchy.
0182
0183
0184 What: /sys/bus/cxl/devices/endpointX/CDAT
0185 Date: July, 2022
0186 KernelVersion: v5.20
0187 Contact: linux-cxl@vger.kernel.org
0188 Description:
0189 (RO) If this sysfs entry is not present no DOE mailbox was
0190 found to support CDAT data. If it is present and the length of
0191 the data is 0 reading the CDAT data failed. Otherwise the CDAT
0192 data is reported.
0193
0194
0195 What: /sys/bus/cxl/devices/decoderX.Y/mode
0196 Date: May, 2022
0197 KernelVersion: v5.20
0198 Contact: linux-cxl@vger.kernel.org
0199 Description:
0200 (RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it
0201 translates from a host physical address range, to a device local
0202 address range. Device-local address ranges are further split
0203 into a 'ram' (volatile memory) range and 'pmem' (persistent
0204 memory) range. The 'mode' attribute emits one of 'ram', 'pmem',
0205 'mixed', or 'none'. The 'mixed' indication is for error cases
0206 when a decoder straddles the volatile/persistent partition
0207 boundary, and 'none' indicates the decoder is not actively
0208 decoding, or no DPA allocation policy has been set.
0209
0210 'mode' can be written, when the decoder is in the 'disabled'
0211 state, with either 'ram' or 'pmem' to set the boundaries for the
0212 next allocation.
0213
0214
0215 What: /sys/bus/cxl/devices/decoderX.Y/dpa_resource
0216 Date: May, 2022
0217 KernelVersion: v5.20
0218 Contact: linux-cxl@vger.kernel.org
0219 Description:
0220 (RO) When a CXL decoder is of devtype "cxl_decoder_endpoint",
0221 and its 'dpa_size' attribute is non-zero, this attribute
0222 indicates the device physical address (DPA) base address of the
0223 allocation.
0224
0225
0226 What: /sys/bus/cxl/devices/decoderX.Y/dpa_size
0227 Date: May, 2022
0228 KernelVersion: v5.20
0229 Contact: linux-cxl@vger.kernel.org
0230 Description:
0231 (RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it
0232 translates from a host physical address range, to a device local
0233 address range. The range, base address plus length in bytes, of
0234 DPA allocated to this decoder is conveyed in these 2 attributes.
0235 Allocations can be mutated as long as the decoder is in the
0236 disabled state. A write to 'dpa_size' releases the previous DPA
0237 allocation and then attempts to allocate from the free capacity
0238 in the device partition referred to by 'decoderX.Y/mode'.
0239 Allocate and free requests can only be performed on the highest
0240 instance number disabled decoder with non-zero size. I.e.
0241 allocations are enforced to occur in increasing 'decoderX.Y/id'
0242 order and frees are enforced to occur in decreasing
0243 'decoderX.Y/id' order.
0244
0245
0246 What: /sys/bus/cxl/devices/decoderX.Y/interleave_ways
0247 Date: May, 2022
0248 KernelVersion: v5.20
0249 Contact: linux-cxl@vger.kernel.org
0250 Description:
0251 (RO) The number of targets across which this decoder's host
0252 physical address (HPA) memory range is interleaved. The device
0253 maps every Nth block of HPA (of size ==
0254 'interleave_granularity') to consecutive DPA addresses. The
0255 decoder's position in the interleave is determined by the
0256 device's (endpoint or switch) switch ancestry. For root
0257 decoders their interleave is specified by platform firmware and
0258 they only specify a downstream target order for host bridges.
0259
0260
0261 What: /sys/bus/cxl/devices/decoderX.Y/interleave_granularity
0262 Date: May, 2022
0263 KernelVersion: v5.20
0264 Contact: linux-cxl@vger.kernel.org
0265 Description:
0266 (RO) The number of consecutive bytes of host physical address
0267 space this decoder claims at address N before the decode rotates
0268 to the next target in the interleave at address N +
0269 interleave_granularity (assuming N is aligned to
0270 interleave_granularity).
0271
0272
0273 What: /sys/bus/cxl/devices/decoderX.Y/create_pmem_region
0274 Date: May, 2022
0275 KernelVersion: v5.20
0276 Contact: linux-cxl@vger.kernel.org
0277 Description:
0278 (RW) Write a string in the form 'regionZ' to start the process
0279 of defining a new persistent memory region (interleave-set)
0280 within the decode range bounded by root decoder 'decoderX.Y'.
0281 The value written must match the current value returned from
0282 reading this attribute. An atomic compare exchange operation is
0283 done on write to assign the requested id to a region and
0284 allocate the region-id for the next creation attempt. EBUSY is
0285 returned if the region name written does not match the current
0286 cached value.
0287
0288
0289 What: /sys/bus/cxl/devices/decoderX.Y/delete_region
0290 Date: May, 2022
0291 KernelVersion: v5.20
0292 Contact: linux-cxl@vger.kernel.org
0293 Description:
0294 (WO) Write a string in the form 'regionZ' to delete that region,
0295 provided it is currently idle / not bound to a driver.
0296
0297
0298 What: /sys/bus/cxl/devices/regionZ/uuid
0299 Date: May, 2022
0300 KernelVersion: v5.20
0301 Contact: linux-cxl@vger.kernel.org
0302 Description:
0303 (RW) Write a unique identifier for the region. This field must
0304 be set for persistent regions and it must not conflict with the
0305 UUID of another region.
0306
0307
0308 What: /sys/bus/cxl/devices/regionZ/interleave_granularity
0309 Date: May, 2022
0310 KernelVersion: v5.20
0311 Contact: linux-cxl@vger.kernel.org
0312 Description:
0313 (RW) Set the number of consecutive bytes each device in the
0314 interleave set will claim. The possible interleave granularity
0315 values are determined by the CXL spec and the participating
0316 devices.
0317
0318
0319 What: /sys/bus/cxl/devices/regionZ/interleave_ways
0320 Date: May, 2022
0321 KernelVersion: v5.20
0322 Contact: linux-cxl@vger.kernel.org
0323 Description:
0324 (RW) Configures the number of devices participating in the
0325 region is set by writing this value. Each device will provide
0326 1/interleave_ways of storage for the region.
0327
0328
0329 What: /sys/bus/cxl/devices/regionZ/size
0330 Date: May, 2022
0331 KernelVersion: v5.20
0332 Contact: linux-cxl@vger.kernel.org
0333 Description:
0334 (RW) System physical address space to be consumed by the region.
0335 When written trigger the driver to allocate space out of the
0336 parent root decoder's address space. When read the size of the
0337 address space is reported and should match the span of the
0338 region's resource attribute. Size shall be set after the
0339 interleave configuration parameters. Once set it cannot be
0340 changed, only freed by writing 0. The kernel makes no guarantees
0341 that data is maintained over an address space freeing event, and
0342 there is no guarantee that a free followed by an allocate
0343 results in the same address being allocated.
0344
0345
0346 What: /sys/bus/cxl/devices/regionZ/resource
0347 Date: May, 2022
0348 KernelVersion: v5.20
0349 Contact: linux-cxl@vger.kernel.org
0350 Description:
0351 (RO) A region is a contiguous partition of a CXL root decoder
0352 address space. Region capacity is allocated by writing to the
0353 size attribute, the resulting physical address space determined
0354 by the driver is reflected here. It is therefore not useful to
0355 read this before writing a value to the size attribute.
0356
0357
0358 What: /sys/bus/cxl/devices/regionZ/target[0..N]
0359 Date: May, 2022
0360 KernelVersion: v5.20
0361 Contact: linux-cxl@vger.kernel.org
0362 Description:
0363 (RW) Write an endpoint decoder object name to 'targetX' where X
0364 is the intended position of the endpoint device in the region
0365 interleave and N is the 'interleave_ways' setting for the
0366 region. ENXIO is returned if the write results in an impossible
0367 to map decode scenario, like the endpoint is unreachable at that
0368 position relative to the root decoder interleave. EBUSY is
0369 returned if the position in the region is already occupied, or
0370 if the region is not in a state to accept interleave
0371 configuration changes. EINVAL is returned if the object name is
0372 not an endpoint decoder. Once all positions have been
0373 successfully written a final validation for decode conflicts is
0374 performed before activating the region.
0375
0376
0377 What: /sys/bus/cxl/devices/regionZ/commit
0378 Date: May, 2022
0379 KernelVersion: v5.20
0380 Contact: linux-cxl@vger.kernel.org
0381 Description:
0382 (RW) Write a boolean 'true' string value to this attribute to
0383 trigger the region to transition from the software programmed
0384 state to the actively decoding in hardware state. The commit
0385 operation in addition to validating that the region is in proper
0386 configured state, validates that the decoders are being
0387 committed in spec mandated order (last committed decoder id +
0388 1), and checks that the hardware accepts the commit request.
0389 Reading this value indicates whether the region is committed or
0390 not.
