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OSCL-LXR

 
 

    


0001 What:           /sys/kernel/debug/moxtet/input
0002 Date:           March 2019
0003 KernelVersion:  5.3
0004 Contact:        Marek Behún <kabel@kernel.org>
0005 Description:    (Read) Read input from the shift registers, in hexadecimal.
0006                 Returns N+1 bytes, where N is the number of Moxtet connected
0007                 modules. The first byte is from the CPU board itself.
0008 
0009                 Example::
0010 
0011                         101214
0012 
0013                 ==  =======================================
0014                 10  CPU board with SD card
0015                 12  2 = PCIe module, 1 = IRQ not active
0016                 14  4 = Peridot module, 1 = IRQ not active
0017                 ==  =======================================
0018 
0019 What:           /sys/kernel/debug/moxtet/output
0020 Date:           March 2019
0021 KernelVersion:  5.3
0022 Contact:        Marek Behún <kabel@kernel.org>
0023 Description:    (RW) Read last written value to the shift registers, in
0024                 hexadecimal, or write values to the shift registers, also
0025                 in hexadecimal.
0026 
0027                 Example::
0028 
0029                     0102
0030 
0031                 ==  ================================================
0032                 01  01 was last written, or is to be written, to the
0033                     first module's shift register
0034                 02  the same for second module
0035                 ==  ================================================