0001 What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address
0002 Date: April 2017
0003 Contact: Jeremy Kerr <jk@ozlabs.org>
0004 Description: Configures which IO port the host side of the UART
0005 will appear on the host <-> BMC LPC bus.
0006 Users: OpenBMC. Proposed changes should be mailed to
0007 openbmc@lists.ozlabs.org
0008
0009 What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq
0010 Date: April 2017
0011 Contact: Jeremy Kerr <jk@ozlabs.org>
0012 Description: Configures which interrupt number the host side of
0013 the UART will appear on the host <-> BMC LPC bus.
0014 Users: OpenBMC. Proposed changes should be mailed to
0015 openbmc@lists.ozlabs.org
0016
0017 What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity
0018 Date: July 2019
0019 Contact: Oskar Senft <osk@google.com>
0020 Description: Configures the polarity of the serial interrupt to the
0021 host via the BMC LPC bus.
0022 Set to 0 for active-low or 1 for active-high.
0023 Users: OpenBMC. Proposed changes should be mailed to
0024 openbmc@lists.ozlabs.org