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0001 /* Boot entry point for a compressed MN10300 kernel
0002  *
0003  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
0004  * Written by David Howells (dhowells@redhat.com)
0005  *
0006  * This program is free software; you can redistribute it and/or
0007  * modify it under the terms of the GNU General Public Licence
0008  * as published by the Free Software Foundation; either version
0009  * 2 of the Licence, or (at your option) any later version.
0010  */
0011     .section    .text
0012 
0013 #define DEBUG
0014 
0015 #include <linux/linkage.h>
0016 #include <asm/cpu-regs.h>
0017 #include <asm/cache.h>
0018 #ifdef CONFIG_SMP
0019 #include <proc/smp-regs.h>
0020 #endif
0021 
0022     .globl startup_32
0023 startup_32:
0024 #ifdef CONFIG_SMP
0025     #
0026     # Secondary CPUs jump directly to the kernel entry point
0027     #
0028     # Must save primary CPU's D0-D2 registers as they hold boot parameters
0029     #
0030     mov (CPUID), d3
0031     and CPUID_MASK,d3
0032     beq startup_primary
0033     mov CONFIG_KERNEL_TEXT_ADDRESS,a0
0034     jmp (a0)
0035 
0036 startup_primary:
0037 #endif /* CONFIG_SMP */
0038 
0039     # first save parameters from bootloader
0040     mov param_save_area,a0
0041     mov d0,(a0)
0042     mov d1,(4,a0)
0043     mov d2,(8,a0)
0044 
0045     mov sp,a3
0046     mov decomp_stack+0x2000-4,a0
0047     mov a0,sp
0048 
0049     # invalidate and enable both of the caches
0050     mov CHCTR,a0
0051     clr d0
0052     movhu   d0,(a0)                 # turn off first
0053     mov CHCTR_ICINV|CHCTR_DCINV,d0
0054     movhu   d0,(a0)
0055     setlb
0056     mov (a0),d0
0057     btst    CHCTR_ICBUSY|CHCTR_DCBUSY,d0        # wait till not busy
0058     lne
0059 
0060 #ifdef CONFIG_MN10300_CACHE_ENABLED
0061 #ifdef CONFIG_MN10300_CACHE_WBACK
0062     mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
0063 #else
0064     mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
0065 #endif /* WBACK */
0066     movhu   d0,(a0)                 # enable
0067 #endif /* !ENABLED */
0068 
0069     # clear the BSS area
0070     mov __bss_start,a0
0071     mov _end,a1
0072     clr d0
0073 bssclear:
0074     cmp a1,a0
0075     bge bssclear_end
0076     movbu   d0,(a0)
0077     inc a0
0078     bra bssclear
0079 bssclear_end:
0080 
0081     # decompress the kernel
0082     call    decompress_kernel[],0
0083 #ifdef CONFIG_MN10300_CACHE_WBACK
0084     call    mn10300_dcache_flush_inv[],0
0085 #endif
0086 
0087     # disable caches again
0088     mov CHCTR,a0
0089     clr d0
0090     movhu   d0,(a0)
0091     setlb
0092     mov (a0),d0
0093     btst    CHCTR_ICBUSY|CHCTR_DCBUSY,d0        # wait till not busy
0094     lne
0095 
0096     mov param_save_area,a0
0097     mov (a0),d0
0098     mov (4,a0),d1
0099     mov (8,a0),d2
0100 
0101     # jump to the kernel proper entry point
0102     mov a3,sp
0103     mov CONFIG_KERNEL_TEXT_ADDRESS,a0
0104     jmp (a0)
0105 
0106 
0107 ###############################################################################
0108 #
0109 # Cache flush routines
0110 #
0111 ###############################################################################
0112 #ifdef CONFIG_MN10300_CACHE_WBACK
0113 mn10300_dcache_flush_inv:
0114     movhu   (CHCTR),d0
0115     btst    CHCTR_DCEN,d0
0116     beq mn10300_dcache_flush_inv_end
0117 
0118     mov L1_CACHE_NENTRIES,d1
0119     clr a1
0120 
0121 mn10300_dcache_flush_inv_loop:
0122     mov (DCACHE_PURGE_WAY0(0),a1),d0    # unconditional purge
0123     mov (DCACHE_PURGE_WAY1(0),a1),d0    # unconditional purge
0124     mov (DCACHE_PURGE_WAY2(0),a1),d0    # unconditional purge
0125     mov (DCACHE_PURGE_WAY3(0),a1),d0    # unconditional purge
0126 
0127     add L1_CACHE_BYTES,a1
0128     add -1,d1
0129     bne mn10300_dcache_flush_inv_loop
0130 
0131 mn10300_dcache_flush_inv_end:
0132     ret [],0
0133 #endif /* CONFIG_MN10300_CACHE_WBACK */
0134 
0135 
0136 ###############################################################################
0137 #
0138 # Data areas
0139 #
0140 ###############################################################################
0141     .data
0142     .align      4
0143 param_save_area:
0144     .rept 3
0145     .word       0
0146     .endr
0147 
0148     .section    .bss
0149     .align      4
0150 decomp_stack:
0151     .space      0x2000