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0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2000 Silicon Graphics, Inc.
0007  * Copyright (C) 2005 Ralf Baechle <ralf@linux-mips.org>
0008  */
0009 #ifndef __ASM_MACH_IP27_KERNEL_ENTRY_H
0010 #define __ASM_MACH_IP27_KERNEL_ENTRY_H
0011 
0012 #include <asm/sn/addrs.h>
0013 #include <asm/sn/sn0/hubni.h>
0014 #include <asm/sn/klkernvars.h>
0015 
0016 /*
0017  * Returns the local nasid into res.
0018  */
0019     .macro GET_NASID_ASM res
0020     dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
0021     ld  \res, (\res)
0022     and \res, NSRI_NODEID_MASK
0023     dsrl    \res, NSRI_NODEID_SHFT
0024     .endm
0025 
0026 /*
0027  * TLB bits
0028  */
0029 #define PAGE_GLOBAL     (1 << 6)
0030 #define PAGE_VALID      (1 << 7)
0031 #define PAGE_DIRTY      (1 << 8)
0032 #define CACHE_CACHABLE_COW  (5 << 9)
0033 
0034     /*
0035      * inputs are the text nasid in t1, data nasid in t2.
0036      */
0037     .macro MAPPED_KERNEL_SETUP_TLB
0038 #ifdef CONFIG_MAPPED_KERNEL
0039     /*
0040      * This needs to read the nasid - assume 0 for now.
0041      * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
0042      * 0+DVG in tlblo_1.
0043      */
0044     dli t0, 0xffffffffc0000000
0045     dmtc0   t0, CP0_ENTRYHI
0046     li  t0, 0x1c000     # Offset of text into node memory
0047     dsll    t1, NASID_SHFT      # Shift text nasid into place
0048     dsll    t2, NASID_SHFT      # Same for data nasid
0049     or  t1, t1, t0      # Physical load address of kernel text
0050     or  t2, t2, t0      # Physical load address of kernel data
0051     dsrl    t1, 12          # 4K pfn
0052     dsrl    t2, 12          # 4K pfn
0053     dsll    t1, 6           # Get pfn into place
0054     dsll    t2, 6           # Get pfn into place
0055     li  t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6)
0056     or  t0, t0, t1
0057     mtc0    t0, CP0_ENTRYLO0    # physaddr, VG, cach exlwr
0058     li  t0, ((PAGE_GLOBAL | PAGE_VALID |  PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6)
0059     or  t0, t0, t2
0060     mtc0    t0, CP0_ENTRYLO1    # physaddr, DVG, cach exlwr
0061     li  t0, 0x1ffe000       # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
0062     mtc0    t0, CP0_PAGEMASK
0063     li  t0, 0           # KMAP_INX
0064     mtc0    t0, CP0_INDEX
0065     li  t0, 1
0066     mtc0    t0, CP0_WIRED
0067     tlbwi
0068 #else
0069     mtc0    zero, CP0_WIRED
0070 #endif
0071     .endm
0072 
0073 /*
0074  * Intentionally empty macro, used in head.S. Override in
0075  * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
0076  */
0077     .macro  kernel_entry_setup
0078     GET_NASID_ASM   t1
0079     move        t2, t1          # text and data are here
0080     MAPPED_KERNEL_SETUP_TLB
0081     .endm
0082 
0083 /*
0084  * Do SMP slave processor setup necessary before we can safely execute C code.
0085  */
0086     .macro  smp_slave_setup
0087     GET_NASID_ASM   t1
0088     dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
0089             KLDIR_OFF_POINTER + CAC_BASE
0090     dsll    t1, NASID_SHFT
0091     or  t0, t0, t1
0092     ld  t0, 0(t0)           # t0 points to kern_vars struct
0093     lh  t1, KV_RO_NASID_OFFSET(t0)
0094     lh  t2, KV_RW_NASID_OFFSET(t0)
0095     MAPPED_KERNEL_SETUP_TLB
0096 
0097     /*
0098      * We might not get launched at the address the kernel is linked to,
0099      * so we jump there.
0100      */
0101     PTR_LA  t0, 0f
0102     jr  t0
0103 0:
0104     .endm
0105 
0106 #endif /* __ASM_MACH_IP27_KERNEL_ENTRY_H */