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0001 /*
0002  * arch/ia64/kernel/entry.S
0003  *
0004  * Kernel entry points.
0005  *
0006  * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
0007  *  David Mosberger-Tang <davidm@hpl.hp.com>
0008  * Copyright (C) 1999, 2002-2003
0009  *  Asit Mallick <Asit.K.Mallick@intel.com>
0010  *  Don Dugger <Don.Dugger@intel.com>
0011  *  Suresh Siddha <suresh.b.siddha@intel.com>
0012  *  Fenghua Yu <fenghua.yu@intel.com>
0013  * Copyright (C) 1999 VA Linux Systems
0014  * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
0015  */
0016 /*
0017  * ia64_switch_to now places correct virtual mapping in in TR2 for
0018  * kernel stack. This allows us to handle interrupts without changing
0019  * to physical mode.
0020  *
0021  * Jonathan Nicklin <nicklin@missioncriticallinux.com>
0022  * Patrick O'Rourke <orourke@missioncriticallinux.com>
0023  * 11/07/2000
0024  */
0025 /*
0026  * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
0027  *                    VA Linux Systems Japan K.K.
0028  *                    pv_ops.
0029  */
0030 /*
0031  * Global (preserved) predicate usage on syscall entry/exit path:
0032  *
0033  *  pKStk:      See entry.h.
0034  *  pUStk:      See entry.h.
0035  *  pSys:       See entry.h.
0036  *  pNonSys:    !pSys
0037  */
0038 
0039 
0040 #include <asm/asmmacro.h>
0041 #include <asm/cache.h>
0042 #include <asm/errno.h>
0043 #include <asm/kregs.h>
0044 #include <asm/asm-offsets.h>
0045 #include <asm/pgtable.h>
0046 #include <asm/percpu.h>
0047 #include <asm/processor.h>
0048 #include <asm/thread_info.h>
0049 #include <asm/unistd.h>
0050 #include <asm/ftrace.h>
0051 #include <asm/export.h>
0052 
0053 #include "minstate.h"
0054 
0055     /*
0056      * execve() is special because in case of success, we need to
0057      * setup a null register window frame.
0058      */
0059 ENTRY(ia64_execve)
0060     /*
0061      * Allocate 8 input registers since ptrace() may clobber them
0062      */
0063     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
0064     alloc loc1=ar.pfs,8,2,3,0
0065     mov loc0=rp
0066     .body
0067     mov out0=in0            // filename
0068     ;;              // stop bit between alloc and call
0069     mov out1=in1            // argv
0070     mov out2=in2            // envp
0071     br.call.sptk.many rp=sys_execve
0072 .ret0:
0073     cmp4.ge p6,p7=r8,r0
0074     mov ar.pfs=loc1         // restore ar.pfs
0075     sxt4 r8=r8          // return 64-bit result
0076     ;;
0077     stf.spill [sp]=f0
0078     mov rp=loc0
0079 (p6)    mov ar.pfs=r0           // clear ar.pfs on success
0080 (p7)    br.ret.sptk.many rp
0081 
0082     /*
0083      * In theory, we'd have to zap this state only to prevent leaking of
0084      * security sensitive state (e.g., if current->mm->dumpable is zero).  However,
0085      * this executes in less than 20 cycles even on Itanium, so it's not worth
0086      * optimizing for...).
0087      */
0088     mov ar.unat=0;      mov ar.lc=0
0089     mov r4=0;       mov f2=f0;      mov b1=r0
0090     mov r5=0;       mov f3=f0;      mov b2=r0
0091     mov r6=0;       mov f4=f0;      mov b3=r0
0092     mov r7=0;       mov f5=f0;      mov b4=r0
0093     ldf.fill f12=[sp];  mov f13=f0;     mov b5=r0
0094     ldf.fill f14=[sp];  ldf.fill f15=[sp];  mov f16=f0
0095     ldf.fill f17=[sp];  ldf.fill f18=[sp];  mov f19=f0
0096     ldf.fill f20=[sp];  ldf.fill f21=[sp];  mov f22=f0
0097     ldf.fill f23=[sp];  ldf.fill f24=[sp];  mov f25=f0
0098     ldf.fill f26=[sp];  ldf.fill f27=[sp];  mov f28=f0
0099     ldf.fill f29=[sp];  ldf.fill f30=[sp];  mov f31=f0
0100     br.ret.sptk.many rp
0101 END(ia64_execve)
0102 
0103 /*
0104  * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
0105  *        u64 tls)
0106  */
0107 GLOBAL_ENTRY(sys_clone2)
0108     /*
0109      * Allocate 8 input registers since ptrace() may clobber them
0110      */
0111     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
0112     alloc r16=ar.pfs,8,2,6,0
0113     DO_SAVE_SWITCH_STACK
0114     adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
0115     mov loc0=rp
0116     mov loc1=r16                // save ar.pfs across do_fork
0117     .body
0118     mov out1=in1
0119     mov out2=in2
0120     tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
0121     mov out3=in3    // parent_tidptr: valid only w/CLONE_PARENT_SETTID
0122     ;;
0123 (p6)    st8 [r2]=in5                // store TLS in r16 for copy_thread()
0124     mov out4=in4    // child_tidptr:  valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
0125     mov out0=in0                // out0 = clone_flags
0126     br.call.sptk.many rp=do_fork
0127 .ret1:  .restore sp
0128     adds sp=IA64_SWITCH_STACK_SIZE,sp   // pop the switch stack
0129     mov ar.pfs=loc1
0130     mov rp=loc0
0131     br.ret.sptk.many rp
0132 END(sys_clone2)
0133 
0134 /*
0135  * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
0136  *  Deprecated.  Use sys_clone2() instead.
0137  */
0138 GLOBAL_ENTRY(sys_clone)
0139     /*
0140      * Allocate 8 input registers since ptrace() may clobber them
0141      */
0142     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
0143     alloc r16=ar.pfs,8,2,6,0
0144     DO_SAVE_SWITCH_STACK
0145     adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
0146     mov loc0=rp
0147     mov loc1=r16                // save ar.pfs across do_fork
0148     .body
0149     mov out1=in1
0150     mov out2=16             // stacksize (compensates for 16-byte scratch area)
0151     tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
0152     mov out3=in2    // parent_tidptr: valid only w/CLONE_PARENT_SETTID
0153     ;;
0154 (p6)    st8 [r2]=in4                // store TLS in r13 (tp)
0155     mov out4=in3    // child_tidptr:  valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
0156     mov out0=in0                // out0 = clone_flags
0157     br.call.sptk.many rp=do_fork
0158 .ret2:  .restore sp
0159     adds sp=IA64_SWITCH_STACK_SIZE,sp   // pop the switch stack
0160     mov ar.pfs=loc1
0161     mov rp=loc0
0162     br.ret.sptk.many rp
0163 END(sys_clone)
0164 
0165 /*
0166  * prev_task <- ia64_switch_to(struct task_struct *next)
0167  *  With Ingo's new scheduler, interrupts are disabled when this routine gets
0168  *  called.  The code starting at .map relies on this.  The rest of the code
0169  *  doesn't care about the interrupt masking status.
0170  */
0171 GLOBAL_ENTRY(ia64_switch_to)
0172     .prologue
0173     alloc r16=ar.pfs,1,0,0,0
0174     DO_SAVE_SWITCH_STACK
0175     .body
0176 
0177     adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
0178     movl r25=init_task
0179     mov r27=IA64_KR(CURRENT_STACK)
0180     adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
0181     dep r20=0,in0,61,3      // physical address of "next"
0182     ;;
0183     st8 [r22]=sp            // save kernel stack pointer of old task
0184     shr.u r26=r20,IA64_GRANULE_SHIFT
0185     cmp.eq p7,p6=r25,in0
0186     ;;
0187     /*
0188      * If we've already mapped this task's page, we can skip doing it again.
0189      */
0190 (p6)    cmp.eq p7,p6=r26,r27
0191 (p6)    br.cond.dpnt .map
0192     ;;
0193 .done:
0194     ld8 sp=[r21]            // load kernel stack pointer of new task
0195     MOV_TO_KR(CURRENT, in0, r8, r9)     // update "current" application register
0196     mov r8=r13          // return pointer to previously running task
0197     mov r13=in0         // set "current" pointer
0198     ;;
0199     DO_LOAD_SWITCH_STACK
0200 
0201 #ifdef CONFIG_SMP
0202     sync.i              // ensure "fc"s done by this CPU are visible on other CPUs
0203 #endif
0204     br.ret.sptk.many rp     // boogie on out in new context
0205 
0206 .map:
0207     RSM_PSR_IC(r25)         // interrupts (psr.i) are already disabled here
0208     movl r25=PAGE_KERNEL
0209     ;;
0210     srlz.d
0211     or r23=r25,r20          // construct PA | page properties
0212     mov r25=IA64_GRANULE_SHIFT<<2
0213     ;;
0214     MOV_TO_ITIR(p0, r25, r8)
0215     MOV_TO_IFA(in0, r8)     // VA of next task...
0216     ;;
0217     mov r25=IA64_TR_CURRENT_STACK
0218     MOV_TO_KR(CURRENT_STACK, r26, r8, r9)   // remember last page we mapped...
0219     ;;
0220     itr.d dtr[r25]=r23      // wire in new mapping...
0221     SSM_PSR_IC_AND_SRLZ_D(r8, r9)   // reenable the psr.ic bit
0222     br.cond.sptk .done
0223 END(ia64_switch_to)
0224 
0225 /*
0226  * Note that interrupts are enabled during save_switch_stack and load_switch_stack.  This
0227  * means that we may get an interrupt with "sp" pointing to the new kernel stack while
0228  * ar.bspstore is still pointing to the old kernel backing store area.  Since ar.rsc,
0229  * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
0230  * problem.  Also, we don't need to specify unwind information for preserved registers
0231  * that are not modified in save_switch_stack as the right unwind information is already
0232  * specified at the call-site of save_switch_stack.
0233  */
0234 
0235 /*
0236  * save_switch_stack:
0237  *  - r16 holds ar.pfs
0238  *  - b7 holds address to return to
0239  *  - rp (b0) holds return address to save
0240  */
0241 GLOBAL_ENTRY(save_switch_stack)
0242     .prologue
0243     .altrp b7
0244     flushrs         // flush dirty regs to backing store (must be first in insn group)
0245     .save @priunat,r17
0246     mov r17=ar.unat     // preserve caller's
0247     .body
0248 #ifdef CONFIG_ITANIUM
0249     adds r2=16+128,sp
0250     adds r3=16+64,sp
0251     adds r14=SW(R4)+16,sp
0252     ;;
0253     st8.spill [r14]=r4,16       // spill r4
0254     lfetch.fault.excl.nt1 [r3],128
0255     ;;
0256     lfetch.fault.excl.nt1 [r2],128
0257     lfetch.fault.excl.nt1 [r3],128
0258     ;;
0259     lfetch.fault.excl [r2]
0260     lfetch.fault.excl [r3]
0261     adds r15=SW(R5)+16,sp
0262 #else
0263     add r2=16+3*128,sp
0264     add r3=16,sp
0265     add r14=SW(R4)+16,sp
0266     ;;
0267     st8.spill [r14]=r4,SW(R6)-SW(R4)    // spill r4 and prefetch offset 0x1c0
0268     lfetch.fault.excl.nt1 [r3],128  //      prefetch offset 0x010
0269     ;;
0270     lfetch.fault.excl.nt1 [r3],128  //      prefetch offset 0x090
0271     lfetch.fault.excl.nt1 [r2],128  //      prefetch offset 0x190
0272     ;;
0273     lfetch.fault.excl.nt1 [r3]  //      prefetch offset 0x110
0274     lfetch.fault.excl.nt1 [r2]  //      prefetch offset 0x210
0275     adds r15=SW(R5)+16,sp
0276 #endif
0277     ;;
0278     st8.spill [r15]=r5,SW(R7)-SW(R5)    // spill r5
0279     mov.m ar.rsc=0          // put RSE in mode: enforced lazy, little endian, pl 0
0280     add r2=SW(F2)+16,sp     // r2 = &sw->f2
0281     ;;
0282     st8.spill [r14]=r6,SW(B0)-SW(R6)    // spill r6
0283     mov.m r18=ar.fpsr       // preserve fpsr
0284     add r3=SW(F3)+16,sp     // r3 = &sw->f3
0285     ;;
0286     stf.spill [r2]=f2,32
0287     mov.m r19=ar.rnat
0288     mov r21=b0
0289 
0290     stf.spill [r3]=f3,32
0291     st8.spill [r15]=r7,SW(B2)-SW(R7)    // spill r7
0292     mov r22=b1
0293     ;;
0294     // since we're done with the spills, read and save ar.unat:
0295     mov.m r29=ar.unat
0296     mov.m r20=ar.bspstore
0297     mov r23=b2
0298     stf.spill [r2]=f4,32
0299     stf.spill [r3]=f5,32
0300     mov r24=b3
0301     ;;
0302     st8 [r14]=r21,SW(B1)-SW(B0)     // save b0
0303     st8 [r15]=r23,SW(B3)-SW(B2)     // save b2
0304     mov r25=b4
0305     mov r26=b5
0306     ;;
0307     st8 [r14]=r22,SW(B4)-SW(B1)     // save b1
0308     st8 [r15]=r24,SW(AR_PFS)-SW(B3)     // save b3
0309     mov r21=ar.lc       // I-unit
0310     stf.spill [r2]=f12,32
0311     stf.spill [r3]=f13,32
0312     ;;
0313     st8 [r14]=r25,SW(B5)-SW(B4)     // save b4
0314     st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS)  // save ar.pfs
0315     stf.spill [r2]=f14,32
0316     stf.spill [r3]=f15,32
0317     ;;
0318     st8 [r14]=r26               // save b5
0319     st8 [r15]=r21               // save ar.lc
0320     stf.spill [r2]=f16,32
0321     stf.spill [r3]=f17,32
0322     ;;
0323     stf.spill [r2]=f18,32
0324     stf.spill [r3]=f19,32
0325     ;;
0326     stf.spill [r2]=f20,32
0327     stf.spill [r3]=f21,32
0328     ;;
0329     stf.spill [r2]=f22,32
0330     stf.spill [r3]=f23,32
0331     ;;
0332     stf.spill [r2]=f24,32
0333     stf.spill [r3]=f25,32
0334     ;;
0335     stf.spill [r2]=f26,32
0336     stf.spill [r3]=f27,32
0337     ;;
0338     stf.spill [r2]=f28,32
0339     stf.spill [r3]=f29,32
0340     ;;
0341     stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
0342     stf.spill [r3]=f31,SW(PR)-SW(F31)
0343     add r14=SW(CALLER_UNAT)+16,sp
0344     ;;
0345     st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT)    // save ar.unat
0346     st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
0347     mov r21=pr
0348     ;;
0349     st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
0350     st8 [r3]=r21                // save predicate registers
0351     ;;
0352     st8 [r2]=r20                // save ar.bspstore
0353     st8 [r14]=r18               // save fpsr
0354     mov ar.rsc=3        // put RSE back into eager mode, pl 0
0355     br.cond.sptk.many b7
0356 END(save_switch_stack)
0357 
0358 /*
0359  * load_switch_stack:
0360  *  - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
0361  *  - b7 holds address to return to
0362  *  - must not touch r8-r11
0363  */
0364 GLOBAL_ENTRY(load_switch_stack)
0365     .prologue
0366     .altrp b7
0367 
0368     .body
0369     lfetch.fault.nt1 [sp]
0370     adds r2=SW(AR_BSPSTORE)+16,sp
0371     adds r3=SW(AR_UNAT)+16,sp
0372     mov ar.rsc=0                        // put RSE into enforced lazy mode
0373     adds r14=SW(CALLER_UNAT)+16,sp
0374     adds r15=SW(AR_FPSR)+16,sp
0375     ;;
0376     ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE))   // bspstore
0377     ld8 r29=[r3],(SW(B1)-SW(AR_UNAT))   // unat
0378     ;;
0379     ld8 r21=[r2],16     // restore b0
0380     ld8 r22=[r3],16     // restore b1
0381     ;;
0382     ld8 r23=[r2],16     // restore b2
0383     ld8 r24=[r3],16     // restore b3
0384     ;;
0385     ld8 r25=[r2],16     // restore b4
0386     ld8 r26=[r3],16     // restore b5
0387     ;;
0388     ld8 r16=[r2],(SW(PR)-SW(AR_PFS))    // ar.pfs
0389     ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC))    // ar.lc
0390     ;;
0391     ld8 r28=[r2]        // restore pr
0392     ld8 r30=[r3]        // restore rnat
0393     ;;
0394     ld8 r18=[r14],16    // restore caller's unat
0395     ld8 r19=[r15],24    // restore fpsr
0396     ;;
0397     ldf.fill f2=[r14],32
0398     ldf.fill f3=[r15],32
0399     ;;
0400     ldf.fill f4=[r14],32
0401     ldf.fill f5=[r15],32
0402     ;;
0403     ldf.fill f12=[r14],32
0404     ldf.fill f13=[r15],32
0405     ;;
0406     ldf.fill f14=[r14],32
0407     ldf.fill f15=[r15],32
0408     ;;
0409     ldf.fill f16=[r14],32
0410     ldf.fill f17=[r15],32
0411     ;;
0412     ldf.fill f18=[r14],32
0413     ldf.fill f19=[r15],32
0414     mov b0=r21
0415     ;;
0416     ldf.fill f20=[r14],32
0417     ldf.fill f21=[r15],32
0418     mov b1=r22
0419     ;;
0420     ldf.fill f22=[r14],32
0421     ldf.fill f23=[r15],32
0422     mov b2=r23
0423     ;;
0424     mov ar.bspstore=r27
0425     mov ar.unat=r29     // establish unat holding the NaT bits for r4-r7
0426     mov b3=r24
0427     ;;
0428     ldf.fill f24=[r14],32
0429     ldf.fill f25=[r15],32
0430     mov b4=r25
0431     ;;
0432     ldf.fill f26=[r14],32
0433     ldf.fill f27=[r15],32
0434     mov b5=r26
0435     ;;
0436     ldf.fill f28=[r14],32
0437     ldf.fill f29=[r15],32
0438     mov ar.pfs=r16
0439     ;;
0440     ldf.fill f30=[r14],32
0441     ldf.fill f31=[r15],24
0442     mov ar.lc=r17
0443     ;;
0444     ld8.fill r4=[r14],16
0445     ld8.fill r5=[r15],16
0446     mov pr=r28,-1
0447     ;;
0448     ld8.fill r6=[r14],16
0449     ld8.fill r7=[r15],16
0450 
0451     mov ar.unat=r18             // restore caller's unat
0452     mov ar.rnat=r30             // must restore after bspstore but before rsc!
0453     mov ar.fpsr=r19             // restore fpsr
0454     mov ar.rsc=3                // put RSE back into eager mode, pl 0
0455     br.cond.sptk.many b7
0456 END(load_switch_stack)
0457 
0458 GLOBAL_ENTRY(prefetch_stack)
0459     add r14 = -IA64_SWITCH_STACK_SIZE, sp
0460     add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
0461     ;;
0462     ld8 r16 = [r15]             // load next's stack pointer
0463     lfetch.fault.excl [r14], 128
0464     ;;
0465     lfetch.fault.excl [r14], 128
0466     lfetch.fault [r16], 128
0467     ;;
0468     lfetch.fault.excl [r14], 128
0469     lfetch.fault [r16], 128
0470     ;;
0471     lfetch.fault.excl [r14], 128
0472     lfetch.fault [r16], 128
0473     ;;
0474     lfetch.fault.excl [r14], 128
0475     lfetch.fault [r16], 128
0476     ;;
0477     lfetch.fault [r16], 128
0478     br.ret.sptk.many rp
0479 END(prefetch_stack)
0480 
0481     /*
0482      * Invoke a system call, but do some tracing before and after the call.
0483      * We MUST preserve the current register frame throughout this routine
0484      * because some system calls (such as ia64_execve) directly
0485      * manipulate ar.pfs.
0486      */
0487 GLOBAL_ENTRY(ia64_trace_syscall)
0488     PT_REGS_UNWIND_INFO(0)
0489     /*
0490      * We need to preserve the scratch registers f6-f11 in case the system
0491      * call is sigreturn.
0492      */
0493     adds r16=PT(F6)+16,sp
0494     adds r17=PT(F7)+16,sp
0495     ;;
0496     stf.spill [r16]=f6,32
0497     stf.spill [r17]=f7,32
0498     ;;
0499     stf.spill [r16]=f8,32
0500     stf.spill [r17]=f9,32
0501     ;;
0502     stf.spill [r16]=f10
0503     stf.spill [r17]=f11
0504     br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
0505     cmp.lt p6,p0=r8,r0          // check tracehook
0506     adds r2=PT(R8)+16,sp            // r2 = &pt_regs.r8
0507     adds r3=PT(R10)+16,sp           // r3 = &pt_regs.r10
0508     mov r10=0
0509 (p6)    br.cond.sptk strace_error       // syscall failed ->
0510     adds r16=PT(F6)+16,sp
0511     adds r17=PT(F7)+16,sp
0512     ;;
0513     ldf.fill f6=[r16],32
0514     ldf.fill f7=[r17],32
0515     ;;
0516     ldf.fill f8=[r16],32
0517     ldf.fill f9=[r17],32
0518     ;;
0519     ldf.fill f10=[r16]
0520     ldf.fill f11=[r17]
0521     // the syscall number may have changed, so re-load it and re-calculate the
0522     // syscall entry-point:
0523     adds r15=PT(R15)+16,sp          // r15 = &pt_regs.r15 (syscall #)
0524     ;;
0525     ld8 r15=[r15]
0526     mov r3=NR_syscalls - 1
0527     ;;
0528     adds r15=-1024,r15
0529     movl r16=sys_call_table
0530     ;;
0531     shladd r20=r15,3,r16            // r20 = sys_call_table + 8*(syscall-1024)
0532     cmp.leu p6,p7=r15,r3
0533     ;;
0534 (p6)    ld8 r20=[r20]               // load address of syscall entry point
0535 (p7)    movl r20=sys_ni_syscall
0536     ;;
0537     mov b6=r20
0538     br.call.sptk.many rp=b6         // do the syscall
0539 .strace_check_retval:
0540     cmp.lt p6,p0=r8,r0          // syscall failed?
0541     adds r2=PT(R8)+16,sp            // r2 = &pt_regs.r8
0542     adds r3=PT(R10)+16,sp           // r3 = &pt_regs.r10
0543     mov r10=0
0544 (p6)    br.cond.sptk strace_error       // syscall failed ->
0545     ;;                  // avoid RAW on r10
0546 .strace_save_retval:
0547 .mem.offset 0,0; st8.spill [r2]=r8      // store return value in slot for r8
0548 .mem.offset 8,0; st8.spill [r3]=r10     // clear error indication in slot for r10
0549     br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
0550 .ret3:
0551 (pUStk) cmp.eq.unc p6,p0=r0,r0          // p6 <- pUStk
0552 (pUStk) rsm psr.i               // disable interrupts
0553     br.cond.sptk ia64_work_pending_syscall_end
0554 
0555 strace_error:
0556     ld8 r3=[r2]             // load pt_regs.r8
0557     sub r9=0,r8             // negate return value to get errno value
0558     ;;
0559     cmp.ne p6,p0=r3,r0          // is pt_regs.r8!=0?
0560     adds r3=16,r2               // r3=&pt_regs.r10
0561     ;;
0562 (p6)    mov r10=-1
0563 (p6)    mov r8=r9
0564     br.cond.sptk .strace_save_retval
0565 END(ia64_trace_syscall)
0566 
0567     /*
0568      * When traced and returning from sigreturn, we invoke syscall_trace but then
0569      * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
0570      */
0571 GLOBAL_ENTRY(ia64_strace_leave_kernel)
0572     PT_REGS_UNWIND_INFO(0)
0573 {   /*
0574      * Some versions of gas generate bad unwind info if the first instruction of a
0575      * procedure doesn't go into the first slot of a bundle.  This is a workaround.
0576      */
0577     nop.m 0
0578     nop.i 0
0579     br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
0580 }
0581 .ret4:  br.cond.sptk ia64_leave_kernel
0582 END(ia64_strace_leave_kernel)
0583 
0584 ENTRY(call_payload)
0585     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0)
0586     /* call the kernel_thread payload; fn is in r4, arg - in r5 */
0587     alloc loc1=ar.pfs,0,3,1,0
0588     mov loc0=rp
0589     mov loc2=gp
0590     mov out0=r5     // arg
0591     ld8 r14 = [r4], 8   // fn.address
0592     ;;
0593     mov b6 = r14
0594     ld8 gp = [r4]       // fn.gp
0595     ;;
0596     br.call.sptk.many rp=b6 // fn(arg)
0597 .ret12: mov gp=loc2
0598     mov rp=loc0
0599     mov ar.pfs=loc1
0600     /* ... and if it has returned, we are going to userland */
0601     cmp.ne pKStk,pUStk=r0,r0
0602     br.ret.sptk.many rp
0603 END(call_payload)
0604 
0605 GLOBAL_ENTRY(ia64_ret_from_clone)
0606     PT_REGS_UNWIND_INFO(0)
0607 {   /*
0608      * Some versions of gas generate bad unwind info if the first instruction of a
0609      * procedure doesn't go into the first slot of a bundle.  This is a workaround.
0610      */
0611     nop.m 0
0612     nop.i 0
0613     /*
0614      * We need to call schedule_tail() to complete the scheduling process.
0615      * Called by ia64_switch_to() after do_fork()->copy_thread().  r8 contains the
0616      * address of the previously executing task.
0617      */
0618     br.call.sptk.many rp=ia64_invoke_schedule_tail
0619 }
0620 .ret8:
0621 (pKStk) br.call.sptk.many rp=call_payload
0622     adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
0623     ;;
0624     ld4 r2=[r2]
0625     ;;
0626     mov r8=0
0627     and r2=_TIF_SYSCALL_TRACEAUDIT,r2
0628     ;;
0629     cmp.ne p6,p0=r2,r0
0630 (p6)    br.cond.spnt .strace_check_retval
0631     ;;                  // added stop bits to prevent r8 dependency
0632 END(ia64_ret_from_clone)
0633     // fall through
0634 GLOBAL_ENTRY(ia64_ret_from_syscall)
0635     PT_REGS_UNWIND_INFO(0)
0636     cmp.ge p6,p7=r8,r0          // syscall executed successfully?
0637     adds r2=PT(R8)+16,sp            // r2 = &pt_regs.r8
0638     mov r10=r0              // clear error indication in r10
0639 (p7)    br.cond.spnt handle_syscall_error   // handle potential syscall failure
0640 END(ia64_ret_from_syscall)
0641     // fall through
0642 
0643 /*
0644  * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
0645  *  need to switch to bank 0 and doesn't restore the scratch registers.
0646  *  To avoid leaking kernel bits, the scratch registers are set to
0647  *  the following known-to-be-safe values:
0648  *
0649  *        r1: restored (global pointer)
0650  *        r2: cleared
0651  *        r3: 1 (when returning to user-level)
0652  *        r8-r11: restored (syscall return value(s))
0653  *       r12: restored (user-level stack pointer)
0654  *       r13: restored (user-level thread pointer)
0655  *       r14: set to __kernel_syscall_via_epc
0656  *       r15: restored (syscall #)
0657  *       r16-r17: cleared
0658  *       r18: user-level b6
0659  *       r19: cleared
0660  *       r20: user-level ar.fpsr
0661  *       r21: user-level b0
0662  *       r22: cleared
0663  *       r23: user-level ar.bspstore
0664  *       r24: user-level ar.rnat
0665  *       r25: user-level ar.unat
0666  *       r26: user-level ar.pfs
0667  *       r27: user-level ar.rsc
0668  *       r28: user-level ip
0669  *       r29: user-level psr
0670  *       r30: user-level cfm
0671  *       r31: user-level pr
0672  *        f6-f11: cleared
0673  *        pr: restored (user-level pr)
0674  *        b0: restored (user-level rp)
0675  *            b6: restored
0676  *        b7: set to __kernel_syscall_via_epc
0677  *       ar.unat: restored (user-level ar.unat)
0678  *        ar.pfs: restored (user-level ar.pfs)
0679  *        ar.rsc: restored (user-level ar.rsc)
0680  *       ar.rnat: restored (user-level ar.rnat)
0681  *   ar.bspstore: restored (user-level ar.bspstore)
0682  *       ar.fpsr: restored (user-level ar.fpsr)
0683  *        ar.ccv: cleared
0684  *        ar.csd: cleared
0685  *        ar.ssd: cleared
0686  */
0687 GLOBAL_ENTRY(ia64_leave_syscall)
0688     PT_REGS_UNWIND_INFO(0)
0689     /*
0690      * work.need_resched etc. mustn't get changed by this CPU before it returns to
0691      * user- or fsys-mode, hence we disable interrupts early on.
0692      *
0693      * p6 controls whether current_thread_info()->flags needs to be check for
0694      * extra work.  We always check for extra work when returning to user-level.
0695      * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
0696      * is 0.  After extra work processing has been completed, execution
0697      * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
0698      * needs to be redone.
0699      */
0700 #ifdef CONFIG_PREEMPT
0701     RSM_PSR_I(p0, r2, r18)          // disable interrupts
0702     cmp.eq pLvSys,p0=r0,r0          // pLvSys=1: leave from syscall
0703 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
0704     ;;
0705     .pred.rel.mutex pUStk,pKStk
0706 (pKStk) ld4 r21=[r20]           // r21 <- preempt_count
0707 (pUStk) mov r21=0           // r21 <- 0
0708     ;;
0709     cmp.eq p6,p0=r21,r0     // p6 <- pUStk || (preempt_count == 0)
0710 #else /* !CONFIG_PREEMPT */
0711     RSM_PSR_I(pUStk, r2, r18)
0712     cmp.eq pLvSys,p0=r0,r0      // pLvSys=1: leave from syscall
0713 (pUStk) cmp.eq.unc p6,p0=r0,r0      // p6 <- pUStk
0714 #endif
0715 .global ia64_work_processed_syscall;
0716 ia64_work_processed_syscall:
0717 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0718     adds r2=PT(LOADRS)+16,r12
0719     MOV_FROM_ITC(pUStk, p9, r22, r19)   // fetch time at leave
0720     adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
0721     ;;
0722 (p6)    ld4 r31=[r18]               // load current_thread_info()->flags
0723     ld8 r19=[r2],PT(B6)-PT(LOADRS)      // load ar.rsc value for "loadrs"
0724     adds r3=PT(AR_BSPSTORE)+16,r12      // deferred
0725     ;;
0726 #else
0727     adds r2=PT(LOADRS)+16,r12
0728     adds r3=PT(AR_BSPSTORE)+16,r12
0729     adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
0730     ;;
0731 (p6)    ld4 r31=[r18]               // load current_thread_info()->flags
0732     ld8 r19=[r2],PT(B6)-PT(LOADRS)      // load ar.rsc value for "loadrs"
0733     nop.i 0
0734     ;;
0735 #endif
0736     mov r16=ar.bsp              // M2  get existing backing store pointer
0737     ld8 r18=[r2],PT(R9)-PT(B6)      // load b6
0738 (p6)    and r15=TIF_WORK_MASK,r31       // any work other than TIF_SYSCALL_TRACE?
0739     ;;
0740     ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE)    // load ar.bspstore (may be garbage)
0741 (p6)    cmp4.ne.unc p6,p0=r15, r0       // any special work pending?
0742 (p6)    br.cond.spnt .work_pending_syscall
0743     ;;
0744     // start restoring the state saved on the kernel stack (struct pt_regs):
0745     ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
0746     ld8 r11=[r3],PT(CR_IIP)-PT(R11)
0747 (pNonSys) break 0       //      bug check: we shouldn't be here if pNonSys is TRUE!
0748     ;;
0749     invala          // M0|1 invalidate ALAT
0750     RSM_PSR_I_IC(r28, r29, r30) // M2   turn off interrupts and interruption collection
0751     cmp.eq p9,p0=r0,r0  // A    set p9 to indicate that we should restore cr.ifs
0752 
0753     ld8 r29=[r2],16     // M0|1 load cr.ipsr
0754     ld8 r28=[r3],16     // M0|1 load cr.iip
0755 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0756 (pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
0757     ;;
0758     ld8 r30=[r2],16     // M0|1 load cr.ifs
0759     ld8 r25=[r3],16     // M0|1 load ar.unat
0760 (pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
0761     ;;
0762 #else
0763     mov r22=r0      // A    clear r22
0764     ;;
0765     ld8 r30=[r2],16     // M0|1 load cr.ifs
0766     ld8 r25=[r3],16     // M0|1 load ar.unat
0767 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
0768     ;;
0769 #endif
0770     ld8 r26=[r2],PT(B0)-PT(AR_PFS)  // M0|1 load ar.pfs
0771     MOV_FROM_PSR(pKStk, r22, r21)   // M2   read PSR now that interrupts are disabled
0772     nop 0
0773     ;;
0774     ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
0775     ld8 r27=[r3],PT(PR)-PT(AR_RSC)  // M0|1 load ar.rsc
0776     mov f6=f0           // F    clear f6
0777     ;;
0778     ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT)    // M0|1 load ar.rnat (may be garbage)
0779     ld8 r31=[r3],PT(R1)-PT(PR)      // M0|1 load predicates
0780     mov f7=f0               // F    clear f7
0781     ;;
0782     ld8 r20=[r2],PT(R12)-PT(AR_FPSR)    // M0|1 load ar.fpsr
0783     ld8.fill r1=[r3],16         // M0|1 load r1
0784 (pUStk) mov r17=1               // A
0785     ;;
0786 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0787 (pUStk) st1 [r15]=r17               // M2|3
0788 #else
0789 (pUStk) st1 [r14]=r17               // M2|3
0790 #endif
0791     ld8.fill r13=[r3],16            // M0|1
0792     mov f8=f0               // F    clear f8
0793     ;;
0794     ld8.fill r12=[r2]           // M0|1 restore r12 (sp)
0795     ld8.fill r15=[r3]           // M0|1 restore r15
0796     mov b6=r18              // I0   restore b6
0797 
0798     LOAD_PHYS_STACK_REG_SIZE(r17)
0799     mov f9=f0                   // F    clear f9
0800 (pKStk) br.cond.dpnt.many skip_rbs_switch       // B
0801 
0802     srlz.d              // M0   ensure interruption collection is off (for cover)
0803     shr.u r18=r19,16        // I0|1 get byte size of existing "dirty" partition
0804     COVER               // B    add current frame into dirty partition & set cr.ifs
0805     ;;
0806 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0807     mov r19=ar.bsp          // M2   get new backing store pointer
0808     st8 [r14]=r22           // M    save time at leave
0809     mov f10=f0          // F    clear f10
0810 
0811     mov r22=r0          // A    clear r22
0812     movl r14=__kernel_syscall_via_epc // X
0813     ;;
0814 #else
0815     mov r19=ar.bsp          // M2   get new backing store pointer
0816     mov f10=f0          // F    clear f10
0817 
0818     nop.m 0
0819     movl r14=__kernel_syscall_via_epc // X
0820     ;;
0821 #endif
0822     mov.m ar.csd=r0         // M2   clear ar.csd
0823     mov.m ar.ccv=r0         // M2   clear ar.ccv
0824     mov b7=r14          // I0   clear b7 (hint with __kernel_syscall_via_epc)
0825 
0826     mov.m ar.ssd=r0         // M2   clear ar.ssd
0827     mov f11=f0          // F    clear f11
0828     br.cond.sptk.many rbs_switch    // B
0829 END(ia64_leave_syscall)
0830 
0831 GLOBAL_ENTRY(ia64_leave_kernel)
0832     PT_REGS_UNWIND_INFO(0)
0833     /*
0834      * work.need_resched etc. mustn't get changed by this CPU before it returns to
0835      * user- or fsys-mode, hence we disable interrupts early on.
0836      *
0837      * p6 controls whether current_thread_info()->flags needs to be check for
0838      * extra work.  We always check for extra work when returning to user-level.
0839      * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
0840      * is 0.  After extra work processing has been completed, execution
0841      * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
0842      * needs to be redone.
0843      */
0844 #ifdef CONFIG_PREEMPT
0845     RSM_PSR_I(p0, r17, r31)         // disable interrupts
0846     cmp.eq p0,pLvSys=r0,r0          // pLvSys=0: leave from kernel
0847 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
0848     ;;
0849     .pred.rel.mutex pUStk,pKStk
0850 (pKStk) ld4 r21=[r20]           // r21 <- preempt_count
0851 (pUStk) mov r21=0           // r21 <- 0
0852     ;;
0853     cmp.eq p6,p0=r21,r0     // p6 <- pUStk || (preempt_count == 0)
0854 #else
0855     RSM_PSR_I(pUStk, r17, r31)
0856     cmp.eq p0,pLvSys=r0,r0      // pLvSys=0: leave from kernel
0857 (pUStk) cmp.eq.unc p6,p0=r0,r0      // p6 <- pUStk
0858 #endif
0859 .work_processed_kernel:
0860     adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
0861     ;;
0862 (p6)    ld4 r31=[r17]               // load current_thread_info()->flags
0863     adds r21=PT(PR)+16,r12
0864     ;;
0865 
0866     lfetch [r21],PT(CR_IPSR)-PT(PR)
0867     adds r2=PT(B6)+16,r12
0868     adds r3=PT(R16)+16,r12
0869     ;;
0870     lfetch [r21]
0871     ld8 r28=[r2],8      // load b6
0872     adds r29=PT(R24)+16,r12
0873 
0874     ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
0875     adds r30=PT(AR_CCV)+16,r12
0876 (p6)    and r19=TIF_WORK_MASK,r31       // any work other than TIF_SYSCALL_TRACE?
0877     ;;
0878     ld8.fill r24=[r29]
0879     ld8 r15=[r30]       // load ar.ccv
0880 (p6)    cmp4.ne.unc p6,p0=r19, r0       // any special work pending?
0881     ;;
0882     ld8 r29=[r2],16     // load b7
0883     ld8 r30=[r3],16     // load ar.csd
0884 (p6)    br.cond.spnt .work_pending
0885     ;;
0886     ld8 r31=[r2],16     // load ar.ssd
0887     ld8.fill r8=[r3],16
0888     ;;
0889     ld8.fill r9=[r2],16
0890     ld8.fill r10=[r3],PT(R17)-PT(R10)
0891     ;;
0892     ld8.fill r11=[r2],PT(R18)-PT(R11)
0893     ld8.fill r17=[r3],16
0894     ;;
0895     ld8.fill r18=[r2],16
0896     ld8.fill r19=[r3],16
0897     ;;
0898     ld8.fill r20=[r2],16
0899     ld8.fill r21=[r3],16
0900     mov ar.csd=r30
0901     mov ar.ssd=r31
0902     ;;
0903     RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
0904     invala          // invalidate ALAT
0905     ;;
0906     ld8.fill r22=[r2],24
0907     ld8.fill r23=[r3],24
0908     mov b6=r28
0909     ;;
0910     ld8.fill r25=[r2],16
0911     ld8.fill r26=[r3],16
0912     mov b7=r29
0913     ;;
0914     ld8.fill r27=[r2],16
0915     ld8.fill r28=[r3],16
0916     ;;
0917     ld8.fill r29=[r2],16
0918     ld8.fill r30=[r3],24
0919     ;;
0920     ld8.fill r31=[r2],PT(F9)-PT(R31)
0921     adds r3=PT(F10)-PT(F6),r3
0922     ;;
0923     ldf.fill f9=[r2],PT(F6)-PT(F9)
0924     ldf.fill f10=[r3],PT(F8)-PT(F10)
0925     ;;
0926     ldf.fill f6=[r2],PT(F7)-PT(F6)
0927     ;;
0928     ldf.fill f7=[r2],PT(F11)-PT(F7)
0929     ldf.fill f8=[r3],32
0930     ;;
0931     srlz.d  // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
0932     mov ar.ccv=r15
0933     ;;
0934     ldf.fill f11=[r2]
0935     BSW_0(r2, r3, r15)  // switch back to bank 0 (no stop bit required beforehand...)
0936     ;;
0937 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
0938     adds r16=PT(CR_IPSR)+16,r12
0939     adds r17=PT(CR_IIP)+16,r12
0940 
0941 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0942     .pred.rel.mutex pUStk,pKStk
0943     MOV_FROM_PSR(pKStk, r22, r29)   // M2 read PSR now that interrupts are disabled
0944     MOV_FROM_ITC(pUStk, p9, r22, r29)   // M  fetch time at leave
0945     nop.i 0
0946     ;;
0947 #else
0948     MOV_FROM_PSR(pKStk, r22, r29)   // M2 read PSR now that interrupts are disabled
0949     nop.i 0
0950     nop.i 0
0951     ;;
0952 #endif
0953     ld8 r29=[r16],16    // load cr.ipsr
0954     ld8 r28=[r17],16    // load cr.iip
0955     ;;
0956     ld8 r30=[r16],16    // load cr.ifs
0957     ld8 r25=[r17],16    // load ar.unat
0958     ;;
0959     ld8 r26=[r16],16    // load ar.pfs
0960     ld8 r27=[r17],16    // load ar.rsc
0961     cmp.eq p9,p0=r0,r0  // set p9 to indicate that we should restore cr.ifs
0962     ;;
0963     ld8 r24=[r16],16    // load ar.rnat (may be garbage)
0964     ld8 r23=[r17],16    // load ar.bspstore (may be garbage)
0965     ;;
0966     ld8 r31=[r16],16    // load predicates
0967     ld8 r21=[r17],16    // load b0
0968     ;;
0969     ld8 r19=[r16],16    // load ar.rsc value for "loadrs"
0970     ld8.fill r1=[r17],16    // load r1
0971     ;;
0972     ld8.fill r12=[r16],16
0973     ld8.fill r13=[r17],16
0974 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0975 (pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
0976 #else
0977 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
0978 #endif
0979     ;;
0980     ld8 r20=[r16],16    // ar.fpsr
0981     ld8.fill r15=[r17],16
0982 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0983 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18  // deferred
0984 #endif
0985     ;;
0986     ld8.fill r14=[r16],16
0987     ld8.fill r2=[r17]
0988 (pUStk) mov r17=1
0989     ;;
0990 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
0991     //  mmi_ :  ld8 st1 shr;;         mmi_ : st8 st1 shr;;
0992     //  mib  :  mov add br        ->  mib  : ld8 add br
0993     //  bbb_ :  br  nop cover;;       mbb_ : mov br  cover;;
0994     //
0995     //  no one require bsp in r16 if (pKStk) branch is selected.
0996 (pUStk) st8 [r3]=r22        // save time at leave
0997 (pUStk) st1 [r18]=r17       // restore current->thread.on_ustack
0998     shr.u r18=r19,16    // get byte size of existing "dirty" partition
0999     ;;
1000     ld8.fill r3=[r16]   // deferred
1001     LOAD_PHYS_STACK_REG_SIZE(r17)
1002 (pKStk) br.cond.dpnt skip_rbs_switch
1003     mov r16=ar.bsp      // get existing backing store pointer
1004 #else
1005     ld8.fill r3=[r16]
1006 (pUStk) st1 [r18]=r17       // restore current->thread.on_ustack
1007     shr.u r18=r19,16    // get byte size of existing "dirty" partition
1008     ;;
1009     mov r16=ar.bsp      // get existing backing store pointer
1010     LOAD_PHYS_STACK_REG_SIZE(r17)
1011 (pKStk) br.cond.dpnt skip_rbs_switch
1012 #endif
1013 
1014     /*
1015      * Restore user backing store.
1016      *
1017      * NOTE: alloc, loadrs, and cover can't be predicated.
1018      */
1019 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1020     COVER               // add current frame into dirty partition and set cr.ifs
1021     ;;
1022     mov r19=ar.bsp          // get new backing store pointer
1023 rbs_switch:
1024     sub r16=r16,r18         // krbs = old bsp - size of dirty partition
1025     cmp.ne p9,p0=r0,r0      // clear p9 to skip restore of cr.ifs
1026     ;;
1027     sub r19=r19,r16         // calculate total byte size of dirty partition
1028     add r18=64,r18          // don't force in0-in7 into memory...
1029     ;;
1030     shl r19=r19,16          // shift size of dirty partition into loadrs position
1031     ;;
1032 dont_preserve_current_frame:
1033     /*
1034      * To prevent leaking bits between the kernel and user-space,
1035      * we must clear the stacked registers in the "invalid" partition here.
1036      * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1037      * 5 registers/cycle on McKinley).
1038      */
1039 #   define pRecurse p6
1040 #   define pReturn  p7
1041 #ifdef CONFIG_ITANIUM
1042 #   define Nregs    10
1043 #else
1044 #   define Nregs    14
1045 #endif
1046     alloc loc0=ar.pfs,2,Nregs-2,2,0
1047     shr.u loc1=r18,9        // RNaTslots <= floor(dirtySize / (64*8))
1048     sub r17=r17,r18         // r17 = (physStackedSize + 8) - dirtySize
1049     ;;
1050     mov ar.rsc=r19          // load ar.rsc to be used for "loadrs"
1051     shladd in0=loc1,3,r17
1052     mov in1=0
1053     ;;
1054     TEXT_ALIGN(32)
1055 rse_clear_invalid:
1056 #ifdef CONFIG_ITANIUM
1057     // cycle 0
1058  { .mii
1059     alloc loc0=ar.pfs,2,Nregs-2,2,0
1060     cmp.lt pRecurse,p0=Nregs*8,in0  // if more than Nregs regs left to clear, (re)curse
1061     add out0=-Nregs*8,in0
1062 }{ .mfb
1063     add out1=1,in1          // increment recursion count
1064     nop.f 0
1065     nop.b 0             // can't do br.call here because of alloc (WAW on CFM)
1066     ;;
1067 }{ .mfi // cycle 1
1068     mov loc1=0
1069     nop.f 0
1070     mov loc2=0
1071 }{ .mib
1072     mov loc3=0
1073     mov loc4=0
1074 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1075 
1076 }{ .mfi // cycle 2
1077     mov loc5=0
1078     nop.f 0
1079     cmp.ne pReturn,p0=r0,in1    // if recursion count != 0, we need to do a br.ret
1080 }{ .mib
1081     mov loc6=0
1082     mov loc7=0
1083 (pReturn) br.ret.sptk.many b0
1084 }
1085 #else /* !CONFIG_ITANIUM */
1086     alloc loc0=ar.pfs,2,Nregs-2,2,0
1087     cmp.lt pRecurse,p0=Nregs*8,in0  // if more than Nregs regs left to clear, (re)curse
1088     add out0=-Nregs*8,in0
1089     add out1=1,in1          // increment recursion count
1090     mov loc1=0
1091     mov loc2=0
1092     ;;
1093     mov loc3=0
1094     mov loc4=0
1095     mov loc5=0
1096     mov loc6=0
1097     mov loc7=0
1098 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1099     ;;
1100     mov loc8=0
1101     mov loc9=0
1102     cmp.ne pReturn,p0=r0,in1    // if recursion count != 0, we need to do a br.ret
1103     mov loc10=0
1104     mov loc11=0
1105 (pReturn) br.ret.dptk.many b0
1106 #endif /* !CONFIG_ITANIUM */
1107 #   undef pRecurse
1108 #   undef pReturn
1109     ;;
1110     alloc r17=ar.pfs,0,0,0,0    // drop current register frame
1111     ;;
1112     loadrs
1113     ;;
1114 skip_rbs_switch:
1115     mov ar.unat=r25     // M2
1116 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1117 (pLvSys)mov r19=r0      // A  clear r19 for leave_syscall, no-op otherwise
1118     ;;
1119 (pUStk) mov ar.bspstore=r23 // M2
1120 (pKStk) dep r29=r22,r29,21,1    // I0 update ipsr.pp with psr.pp
1121 (pLvSys)mov r16=r0      // A  clear r16 for leave_syscall, no-op otherwise
1122     ;;
1123     MOV_TO_IPSR(p0, r29, r25)   // M2
1124     mov ar.pfs=r26      // I0
1125 (pLvSys)mov r17=r0      // A  clear r17 for leave_syscall, no-op otherwise
1126 
1127     MOV_TO_IFS(p9, r30, r25)// M2
1128     mov b0=r21      // I0
1129 (pLvSys)mov r18=r0      // A  clear r18 for leave_syscall, no-op otherwise
1130 
1131     mov ar.fpsr=r20     // M2
1132     MOV_TO_IIP(r28, r25)    // M2
1133     nop 0
1134     ;;
1135 (pUStk) mov ar.rnat=r24     // M2 must happen with RSE in lazy mode
1136     nop 0
1137 (pLvSys)mov r2=r0
1138 
1139     mov ar.rsc=r27      // M2
1140     mov pr=r31,-1       // I0
1141     RFI         // B
1142 
1143     /*
1144      * On entry:
1145      *  r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1146      *  r31 = current->thread_info->flags
1147      * On exit:
1148      *  p6 = TRUE if work-pending-check needs to be redone
1149      *
1150      * Interrupts are disabled on entry, reenabled depend on work, and
1151      * disabled on exit.
1152      */
1153 .work_pending_syscall:
1154     add r2=-8,r2
1155     add r3=-8,r3
1156     ;;
1157     st8 [r2]=r8
1158     st8 [r3]=r10
1159 .work_pending:
1160     tbit.z p6,p0=r31,TIF_NEED_RESCHED   // is resched not needed?
1161 (p6)    br.cond.sptk.few .notify
1162     br.call.spnt.many rp=preempt_schedule_irq
1163 .ret9:  cmp.eq p6,p0=r0,r0  // p6 <- 1 (re-check)
1164 (pLvSys)br.cond.sptk.few  ia64_work_pending_syscall_end
1165     br.cond.sptk.many .work_processed_kernel
1166 
1167 .notify:
1168 (pUStk) br.call.spnt.many rp=notify_resume_user
1169 .ret10: cmp.ne p6,p0=r0,r0  // p6 <- 0 (don't re-check)
1170 (pLvSys)br.cond.sptk.few  ia64_work_pending_syscall_end
1171     br.cond.sptk.many .work_processed_kernel
1172 
1173 .global ia64_work_pending_syscall_end;
1174 ia64_work_pending_syscall_end:
1175     adds r2=PT(R8)+16,r12
1176     adds r3=PT(R10)+16,r12
1177     ;;
1178     ld8 r8=[r2]
1179     ld8 r10=[r3]
1180     br.cond.sptk.many ia64_work_processed_syscall
1181 END(ia64_leave_kernel)
1182 
1183 ENTRY(handle_syscall_error)
1184     /*
1185      * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1186      * lead us to mistake a negative return value as a failed syscall.  Those syscall
1187      * must deposit a non-zero value in pt_regs.r8 to indicate an error.  If
1188      * pt_regs.r8 is zero, we assume that the call completed successfully.
1189      */
1190     PT_REGS_UNWIND_INFO(0)
1191     ld8 r3=[r2]     // load pt_regs.r8
1192     ;;
1193     cmp.eq p6,p7=r3,r0  // is pt_regs.r8==0?
1194     ;;
1195 (p7)    mov r10=-1
1196 (p7)    sub r8=0,r8     // negate return value to get errno
1197     br.cond.sptk ia64_leave_syscall
1198 END(handle_syscall_error)
1199 
1200     /*
1201      * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1202      * in case a system call gets restarted.
1203      */
1204 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1205     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1206     alloc loc1=ar.pfs,8,2,1,0
1207     mov loc0=rp
1208     mov out0=r8             // Address of previous task
1209     ;;
1210     br.call.sptk.many rp=schedule_tail
1211 .ret11: mov ar.pfs=loc1
1212     mov rp=loc0
1213     br.ret.sptk.many rp
1214 END(ia64_invoke_schedule_tail)
1215 
1216     /*
1217      * Setup stack and call do_notify_resume_user(), keeping interrupts
1218      * disabled.
1219      *
1220      * Note that pSys and pNonSys need to be set up by the caller.
1221      * We declare 8 input registers so the system call args get preserved,
1222      * in case we need to restart a system call.
1223      */
1224 GLOBAL_ENTRY(notify_resume_user)
1225     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1226     alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1227     mov r9=ar.unat
1228     mov loc0=rp             // save return address
1229     mov out0=0              // there is no "oldset"
1230     adds out1=8,sp              // out1=&sigscratch->ar_pfs
1231 (pSys)  mov out2=1              // out2==1 => we're in a syscall
1232     ;;
1233 (pNonSys) mov out2=0                // out2==0 => not a syscall
1234     .fframe 16
1235     .spillsp ar.unat, 16
1236     st8 [sp]=r9,-16             // allocate space for ar.unat and save it
1237     st8 [out1]=loc1,-8          // save ar.pfs, out1=&sigscratch
1238     .body
1239     br.call.sptk.many rp=do_notify_resume_user
1240 .ret15: .restore sp
1241     adds sp=16,sp               // pop scratch stack space
1242     ;;
1243     ld8 r9=[sp]             // load new unat from sigscratch->scratch_unat
1244     mov rp=loc0
1245     ;;
1246     mov ar.unat=r9
1247     mov ar.pfs=loc1
1248     br.ret.sptk.many rp
1249 END(notify_resume_user)
1250 
1251 ENTRY(sys_rt_sigreturn)
1252     PT_REGS_UNWIND_INFO(0)
1253     /*
1254      * Allocate 8 input registers since ptrace() may clobber them
1255      */
1256     alloc r2=ar.pfs,8,0,1,0
1257     .prologue
1258     PT_REGS_SAVES(16)
1259     adds sp=-16,sp
1260     .body
1261     cmp.eq pNonSys,pSys=r0,r0       // sigreturn isn't a normal syscall...
1262     ;;
1263     /*
1264      * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1265      * syscall-entry path does not save them we save them here instead.  Note: we
1266      * don't need to save any other registers that are not saved by the stream-lined
1267      * syscall path, because restore_sigcontext() restores them.
1268      */
1269     adds r16=PT(F6)+32,sp
1270     adds r17=PT(F7)+32,sp
1271     ;;
1272     stf.spill [r16]=f6,32
1273     stf.spill [r17]=f7,32
1274     ;;
1275     stf.spill [r16]=f8,32
1276     stf.spill [r17]=f9,32
1277     ;;
1278     stf.spill [r16]=f10
1279     stf.spill [r17]=f11
1280     adds out0=16,sp             // out0 = &sigscratch
1281     br.call.sptk.many rp=ia64_rt_sigreturn
1282 .ret19: .restore sp,0
1283     adds sp=16,sp
1284     ;;
1285     ld8 r9=[sp]             // load new ar.unat
1286     mov.sptk b7=r8,ia64_leave_kernel
1287     ;;
1288     mov ar.unat=r9
1289     br.many b7
1290 END(sys_rt_sigreturn)
1291 
1292 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1293     .prologue
1294     /*
1295      * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1296      */
1297     mov r16=r0
1298     DO_SAVE_SWITCH_STACK
1299     br.call.sptk.many rp=ia64_handle_unaligned  // stack frame setup in ivt
1300 .ret21: .body
1301     DO_LOAD_SWITCH_STACK
1302     br.cond.sptk.many rp                // goes to ia64_leave_kernel
1303 END(ia64_prepare_handle_unaligned)
1304 
1305     //
1306     // unw_init_running(void (*callback)(info, arg), void *arg)
1307     //
1308 #   define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1309 
1310 GLOBAL_ENTRY(unw_init_running)
1311     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1312     alloc loc1=ar.pfs,2,3,3,0
1313     ;;
1314     ld8 loc2=[in0],8
1315     mov loc0=rp
1316     mov r16=loc1
1317     DO_SAVE_SWITCH_STACK
1318     .body
1319 
1320     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1321     .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1322     SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1323     adds sp=-EXTRA_FRAME_SIZE,sp
1324     .body
1325     ;;
1326     adds out0=16,sp             // &info
1327     mov out1=r13                // current
1328     adds out2=16+EXTRA_FRAME_SIZE,sp    // &switch_stack
1329     br.call.sptk.many rp=unw_init_frame_info
1330 1:  adds out0=16,sp             // &info
1331     mov b6=loc2
1332     mov loc2=gp             // save gp across indirect function call
1333     ;;
1334     ld8 gp=[in0]
1335     mov out1=in1                // arg
1336     br.call.sptk.many rp=b6         // invoke the callback function
1337 1:  mov gp=loc2             // restore gp
1338 
1339     // For now, we don't allow changing registers from within
1340     // unw_init_running; if we ever want to allow that, we'd
1341     // have to do a load_switch_stack here:
1342     .restore sp
1343     adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1344 
1345     mov ar.pfs=loc1
1346     mov rp=loc0
1347     br.ret.sptk.many rp
1348 END(unw_init_running)
1349 EXPORT_SYMBOL(unw_init_running)
1350 
1351 #ifdef CONFIG_FUNCTION_TRACER
1352 #ifdef CONFIG_DYNAMIC_FTRACE
1353 GLOBAL_ENTRY(_mcount)
1354     br ftrace_stub
1355 END(_mcount)
1356 EXPORT_SYMBOL(_mcount)
1357 
1358 .here:
1359     br.ret.sptk.many b0
1360 
1361 GLOBAL_ENTRY(ftrace_caller)
1362     alloc out0 = ar.pfs, 8, 0, 4, 0
1363     mov out3 = r0
1364     ;;
1365     mov out2 = b0
1366     add r3 = 0x20, r3
1367     mov out1 = r1;
1368     br.call.sptk.many b0 = ftrace_patch_gp
1369     //this might be called from module, so we must patch gp
1370 ftrace_patch_gp:
1371     movl gp=__gp
1372     mov b0 = r3
1373     ;;
1374 .global ftrace_call;
1375 ftrace_call:
1376 {
1377     .mlx
1378     nop.m 0x0
1379     movl r3 = .here;;
1380 }
1381     alloc loc0 = ar.pfs, 4, 4, 2, 0
1382     ;;
1383     mov loc1 = b0
1384     mov out0 = b0
1385     mov loc2 = r8
1386     mov loc3 = r15
1387     ;;
1388     adds out0 = -MCOUNT_INSN_SIZE, out0
1389     mov out1 = in2
1390     mov b6 = r3
1391 
1392     br.call.sptk.many b0 = b6
1393     ;;
1394     mov ar.pfs = loc0
1395     mov b0 = loc1
1396     mov r8 = loc2
1397     mov r15 = loc3
1398     br ftrace_stub
1399     ;;
1400 END(ftrace_caller)
1401 
1402 #else
1403 GLOBAL_ENTRY(_mcount)
1404     movl r2 = ftrace_stub
1405     movl r3 = ftrace_trace_function;;
1406     ld8 r3 = [r3];;
1407     ld8 r3 = [r3];;
1408     cmp.eq p7,p0 = r2, r3
1409 (p7)    br.sptk.many ftrace_stub
1410     ;;
1411 
1412     alloc loc0 = ar.pfs, 4, 4, 2, 0
1413     ;;
1414     mov loc1 = b0
1415     mov out0 = b0
1416     mov loc2 = r8
1417     mov loc3 = r15
1418     ;;
1419     adds out0 = -MCOUNT_INSN_SIZE, out0
1420     mov out1 = in2
1421     mov b6 = r3
1422 
1423     br.call.sptk.many b0 = b6
1424     ;;
1425     mov ar.pfs = loc0
1426     mov b0 = loc1
1427     mov r8 = loc2
1428     mov r15 = loc3
1429     br ftrace_stub
1430     ;;
1431 END(_mcount)
1432 #endif
1433 
1434 GLOBAL_ENTRY(ftrace_stub)
1435     mov r3 = b0
1436     movl r2 = _mcount_ret_helper
1437     ;;
1438     mov b6 = r2
1439     mov b7 = r3
1440     br.ret.sptk.many b6
1441 
1442 _mcount_ret_helper:
1443     mov b0 = r42
1444     mov r1 = r41
1445     mov ar.pfs = r40
1446     br b7
1447 END(ftrace_stub)
1448 
1449 #endif /* CONFIG_FUNCTION_TRACER */
1450 
1451     .rodata
1452     .align 8
1453     .globl sys_call_table
1454 sys_call_table:
1455     data8 sys_ni_syscall        //  This must be sys_ni_syscall!  See ivt.S.
1456     data8 sys_exit              // 1025
1457     data8 sys_read
1458     data8 sys_write
1459     data8 sys_open
1460     data8 sys_close
1461     data8 sys_creat             // 1030
1462     data8 sys_link
1463     data8 sys_unlink
1464     data8 ia64_execve
1465     data8 sys_chdir
1466     data8 sys_fchdir            // 1035
1467     data8 sys_utimes
1468     data8 sys_mknod
1469     data8 sys_chmod
1470     data8 sys_chown
1471     data8 sys_lseek             // 1040
1472     data8 sys_getpid
1473     data8 sys_getppid
1474     data8 sys_mount
1475     data8 sys_umount
1476     data8 sys_setuid            // 1045
1477     data8 sys_getuid
1478     data8 sys_geteuid
1479     data8 sys_ptrace
1480     data8 sys_access
1481     data8 sys_sync              // 1050
1482     data8 sys_fsync
1483     data8 sys_fdatasync
1484     data8 sys_kill
1485     data8 sys_rename
1486     data8 sys_mkdir             // 1055
1487     data8 sys_rmdir
1488     data8 sys_dup
1489     data8 sys_ia64_pipe
1490     data8 sys_times
1491     data8 ia64_brk              // 1060
1492     data8 sys_setgid
1493     data8 sys_getgid
1494     data8 sys_getegid
1495     data8 sys_acct
1496     data8 sys_ioctl             // 1065
1497     data8 sys_fcntl
1498     data8 sys_umask
1499     data8 sys_chroot
1500     data8 sys_ustat
1501     data8 sys_dup2              // 1070
1502     data8 sys_setreuid
1503     data8 sys_setregid
1504     data8 sys_getresuid
1505     data8 sys_setresuid
1506     data8 sys_getresgid         // 1075
1507     data8 sys_setresgid
1508     data8 sys_getgroups
1509     data8 sys_setgroups
1510     data8 sys_getpgid
1511     data8 sys_setpgid           // 1080
1512     data8 sys_setsid
1513     data8 sys_getsid
1514     data8 sys_sethostname
1515     data8 sys_setrlimit
1516     data8 sys_getrlimit         // 1085
1517     data8 sys_getrusage
1518     data8 sys_gettimeofday
1519     data8 sys_settimeofday
1520     data8 sys_select
1521     data8 sys_poll              // 1090
1522     data8 sys_symlink
1523     data8 sys_readlink
1524     data8 sys_uselib
1525     data8 sys_swapon
1526     data8 sys_swapoff           // 1095
1527     data8 sys_reboot
1528     data8 sys_truncate
1529     data8 sys_ftruncate
1530     data8 sys_fchmod
1531     data8 sys_fchown            // 1100
1532     data8 ia64_getpriority
1533     data8 sys_setpriority
1534     data8 sys_statfs
1535     data8 sys_fstatfs
1536     data8 sys_gettid            // 1105
1537     data8 sys_semget
1538     data8 sys_semop
1539     data8 sys_semctl
1540     data8 sys_msgget
1541     data8 sys_msgsnd            // 1110
1542     data8 sys_msgrcv
1543     data8 sys_msgctl
1544     data8 sys_shmget
1545     data8 sys_shmat
1546     data8 sys_shmdt             // 1115
1547     data8 sys_shmctl
1548     data8 sys_syslog
1549     data8 sys_setitimer
1550     data8 sys_getitimer
1551     data8 sys_ni_syscall            // 1120     /* was: ia64_oldstat */
1552     data8 sys_ni_syscall                    /* was: ia64_oldlstat */
1553     data8 sys_ni_syscall                    /* was: ia64_oldfstat */
1554     data8 sys_vhangup
1555     data8 sys_lchown
1556     data8 sys_remap_file_pages      // 1125
1557     data8 sys_wait4
1558     data8 sys_sysinfo
1559     data8 sys_clone
1560     data8 sys_setdomainname
1561     data8 sys_newuname          // 1130
1562     data8 sys_adjtimex
1563     data8 sys_ni_syscall                    /* was: ia64_create_module */
1564     data8 sys_init_module
1565     data8 sys_delete_module
1566     data8 sys_ni_syscall            // 1135     /* was: sys_get_kernel_syms */
1567     data8 sys_ni_syscall                    /* was: sys_query_module */
1568     data8 sys_quotactl
1569     data8 sys_bdflush
1570     data8 sys_sysfs
1571     data8 sys_personality           // 1140
1572     data8 sys_ni_syscall        // sys_afs_syscall
1573     data8 sys_setfsuid
1574     data8 sys_setfsgid
1575     data8 sys_getdents
1576     data8 sys_flock             // 1145
1577     data8 sys_readv
1578     data8 sys_writev
1579     data8 sys_pread64
1580     data8 sys_pwrite64
1581     data8 sys_sysctl            // 1150
1582     data8 sys_mmap
1583     data8 sys_munmap
1584     data8 sys_mlock
1585     data8 sys_mlockall
1586     data8 sys_mprotect          // 1155
1587     data8 ia64_mremap
1588     data8 sys_msync
1589     data8 sys_munlock
1590     data8 sys_munlockall
1591     data8 sys_sched_getparam        // 1160
1592     data8 sys_sched_setparam
1593     data8 sys_sched_getscheduler
1594     data8 sys_sched_setscheduler
1595     data8 sys_sched_yield
1596     data8 sys_sched_get_priority_max    // 1165
1597     data8 sys_sched_get_priority_min
1598     data8 sys_sched_rr_get_interval
1599     data8 sys_nanosleep
1600     data8 sys_ni_syscall            // old nfsservctl
1601     data8 sys_prctl             // 1170
1602     data8 sys_getpagesize
1603     data8 sys_mmap2
1604     data8 sys_pciconfig_read
1605     data8 sys_pciconfig_write
1606     data8 sys_perfmonctl            // 1175
1607     data8 sys_sigaltstack
1608     data8 sys_rt_sigaction
1609     data8 sys_rt_sigpending
1610     data8 sys_rt_sigprocmask
1611     data8 sys_rt_sigqueueinfo       // 1180
1612     data8 sys_rt_sigreturn
1613     data8 sys_rt_sigsuspend
1614     data8 sys_rt_sigtimedwait
1615     data8 sys_getcwd
1616     data8 sys_capget            // 1185
1617     data8 sys_capset
1618     data8 sys_sendfile64
1619     data8 sys_ni_syscall        // sys_getpmsg (STREAMS)
1620     data8 sys_ni_syscall        // sys_putpmsg (STREAMS)
1621     data8 sys_socket            // 1190
1622     data8 sys_bind
1623     data8 sys_connect
1624     data8 sys_listen
1625     data8 sys_accept
1626     data8 sys_getsockname           // 1195
1627     data8 sys_getpeername
1628     data8 sys_socketpair
1629     data8 sys_send
1630     data8 sys_sendto
1631     data8 sys_recv              // 1200
1632     data8 sys_recvfrom
1633     data8 sys_shutdown
1634     data8 sys_setsockopt
1635     data8 sys_getsockopt
1636     data8 sys_sendmsg           // 1205
1637     data8 sys_recvmsg
1638     data8 sys_pivot_root
1639     data8 sys_mincore
1640     data8 sys_madvise
1641     data8 sys_newstat           // 1210
1642     data8 sys_newlstat
1643     data8 sys_newfstat
1644     data8 sys_clone2
1645     data8 sys_getdents64
1646     data8 sys_getunwind         // 1215
1647     data8 sys_readahead
1648     data8 sys_setxattr
1649     data8 sys_lsetxattr
1650     data8 sys_fsetxattr
1651     data8 sys_getxattr          // 1220
1652     data8 sys_lgetxattr
1653     data8 sys_fgetxattr
1654     data8 sys_listxattr
1655     data8 sys_llistxattr
1656     data8 sys_flistxattr            // 1225
1657     data8 sys_removexattr
1658     data8 sys_lremovexattr
1659     data8 sys_fremovexattr
1660     data8 sys_tkill
1661     data8 sys_futex             // 1230
1662     data8 sys_sched_setaffinity
1663     data8 sys_sched_getaffinity
1664     data8 sys_set_tid_address
1665     data8 sys_fadvise64_64
1666     data8 sys_tgkill            // 1235
1667     data8 sys_exit_group
1668     data8 sys_lookup_dcookie
1669     data8 sys_io_setup
1670     data8 sys_io_destroy
1671     data8 sys_io_getevents          // 1240
1672     data8 sys_io_submit
1673     data8 sys_io_cancel
1674     data8 sys_epoll_create
1675     data8 sys_epoll_ctl
1676     data8 sys_epoll_wait            // 1245
1677     data8 sys_restart_syscall
1678     data8 sys_semtimedop
1679     data8 sys_timer_create
1680     data8 sys_timer_settime
1681     data8 sys_timer_gettime         // 1250
1682     data8 sys_timer_getoverrun
1683     data8 sys_timer_delete
1684     data8 sys_clock_settime
1685     data8 sys_clock_gettime
1686     data8 sys_clock_getres          // 1255
1687     data8 sys_clock_nanosleep
1688     data8 sys_fstatfs64
1689     data8 sys_statfs64
1690     data8 sys_mbind
1691     data8 sys_get_mempolicy         // 1260
1692     data8 sys_set_mempolicy
1693     data8 sys_mq_open
1694     data8 sys_mq_unlink
1695     data8 sys_mq_timedsend
1696     data8 sys_mq_timedreceive       // 1265
1697     data8 sys_mq_notify
1698     data8 sys_mq_getsetattr
1699     data8 sys_kexec_load
1700     data8 sys_ni_syscall            // reserved for vserver
1701     data8 sys_waitid            // 1270
1702     data8 sys_add_key
1703     data8 sys_request_key
1704     data8 sys_keyctl
1705     data8 sys_ioprio_set
1706     data8 sys_ioprio_get            // 1275
1707     data8 sys_move_pages
1708     data8 sys_inotify_init
1709     data8 sys_inotify_add_watch
1710     data8 sys_inotify_rm_watch
1711     data8 sys_migrate_pages         // 1280
1712     data8 sys_openat
1713     data8 sys_mkdirat
1714     data8 sys_mknodat
1715     data8 sys_fchownat
1716     data8 sys_futimesat         // 1285
1717     data8 sys_newfstatat
1718     data8 sys_unlinkat
1719     data8 sys_renameat
1720     data8 sys_linkat
1721     data8 sys_symlinkat         // 1290
1722     data8 sys_readlinkat
1723     data8 sys_fchmodat
1724     data8 sys_faccessat
1725     data8 sys_pselect6
1726     data8 sys_ppoll             // 1295
1727     data8 sys_unshare
1728     data8 sys_splice
1729     data8 sys_set_robust_list
1730     data8 sys_get_robust_list
1731     data8 sys_sync_file_range       // 1300
1732     data8 sys_tee
1733     data8 sys_vmsplice
1734     data8 sys_fallocate
1735     data8 sys_getcpu
1736     data8 sys_epoll_pwait           // 1305
1737     data8 sys_utimensat
1738     data8 sys_signalfd
1739     data8 sys_ni_syscall
1740     data8 sys_eventfd
1741     data8 sys_timerfd_create        // 1310
1742     data8 sys_timerfd_settime
1743     data8 sys_timerfd_gettime
1744     data8 sys_signalfd4
1745     data8 sys_eventfd2
1746     data8 sys_epoll_create1         // 1315
1747     data8 sys_dup3
1748     data8 sys_pipe2
1749     data8 sys_inotify_init1
1750     data8 sys_preadv
1751     data8 sys_pwritev           // 1320
1752     data8 sys_rt_tgsigqueueinfo
1753     data8 sys_recvmmsg
1754     data8 sys_fanotify_init
1755     data8 sys_fanotify_mark
1756     data8 sys_prlimit64         // 1325
1757     data8 sys_name_to_handle_at
1758     data8 sys_open_by_handle_at
1759     data8 sys_clock_adjtime
1760     data8 sys_syncfs
1761     data8 sys_setns             // 1330
1762     data8 sys_sendmmsg
1763     data8 sys_process_vm_readv
1764     data8 sys_process_vm_writev
1765     data8 sys_accept4
1766     data8 sys_finit_module          // 1335
1767     data8 sys_sched_setattr
1768     data8 sys_sched_getattr
1769     data8 sys_renameat2
1770     data8 sys_getrandom
1771     data8 sys_memfd_create          // 1340
1772     data8 sys_bpf
1773     data8 sys_execveat
1774     data8 sys_userfaultfd
1775     data8 sys_membarrier
1776     data8 sys_kcmp              // 1345
1777     data8 sys_mlock2
1778     data8 sys_copy_file_range
1779     data8 sys_preadv2
1780     data8 sys_pwritev2
1781 
1782     .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls