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0001 /*
0002  * Head of the kernel - alter with care
0003  *
0004  * Copyright (C) 2000, 2001, 2010 Axis Communications AB
0005  *
0006  */
0007 
0008 #include <linux/init.h>
0009 
0010 #define ASSEMBLER_MACROS_ONLY
0011 /* The IO_* macros use the ## token concatenation operator, so
0012    -traditional must not be used when assembling this file.  */
0013 #include <arch/sv_addr_ag.h>
0014 
0015 #define CRAMFS_MAGIC 0x28cd3d45
0016 #define RAM_INIT_MAGIC 0x56902387
0017 #define COMMAND_LINE_MAGIC 0x87109563
0018 
0019 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
0020                              IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
0021 
0022     ;; exported symbols
0023 
0024     .globl  etrax_irv
0025     .globl  romfs_start
0026     .globl  romfs_length
0027     .globl  romfs_in_flash
0028     .globl  swapper_pg_dir
0029 
0030     __HEAD
0031 
0032     ;; This is the entry point of the kernel. We are in supervisor mode.
0033     ;; 0x00000000 if Flash, 0x40004000 if DRAM
0034     ;; since etrax actually starts at address 2 when booting from flash, we
0035     ;; put a nop (2 bytes) here first so we dont accidentally skip the di
0036     ;;
0037     ;; NOTICE! The registers r8 and r9 are used as parameters carrying
0038     ;; information from the decompressor (if the kernel was compressed).
0039     ;; They should not be used in the code below until read.
0040 
0041     nop
0042     di
0043 
0044     ;; First setup the kseg_c mapping from where the kernel is linked
0045     ;; to 0x40000000 (where the actual DRAM resides) otherwise
0046     ;; we cannot do very much! See arch/cris/README.mm
0047     ;;
0048     ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
0049     ;; we will get a fault as soon as we enable the MMU if we dont
0050     ;; temporarily map those segments linearily.
0051     ;;
0052     ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
0053     ;; slightly different.  The bug is that you can't remap bit 31 of
0054     ;; an address.  Though we can check the version register for
0055     ;; whether the bug is present, some constants would then have to
0056     ;; be variables, so we don't.  The drawback is that you can "only" map
0057     ;; 1G per process with CONFIG_CRIS_LOW_MAP.
0058 
0059 #ifdef CONFIG_CRIS_LOW_MAP
0060     ; kseg mappings, temporary map of 0xc0->0x40
0061     move.d    IO_FIELD (R_MMU_KBASE_HI, base_c, 4)      \
0062         | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb)    \
0063         | IO_FIELD (R_MMU_KBASE_HI, base_9, 9)      \
0064         | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
0065     move.d  $r0, [R_MMU_KBASE_HI]
0066 
0067     ; temporary map of 0x40->0x40 and 0x60->0x40
0068     move.d    IO_FIELD (R_MMU_KBASE_LO, base_6, 4)      \
0069         | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
0070     move.d  $r0, [R_MMU_KBASE_LO]
0071 
0072     ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
0073     move.d    IO_STATE (R_MMU_CONFIG, mmu_enable, enable)   \
0074         | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
0075         | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
0076         | IO_STATE (R_MMU_CONFIG, we_excp, enable)  \
0077         | IO_STATE (R_MMU_CONFIG, seg_f, page)      \
0078         | IO_STATE (R_MMU_CONFIG, seg_e, seg)       \
0079         | IO_STATE (R_MMU_CONFIG, seg_d, page)      \
0080         | IO_STATE (R_MMU_CONFIG, seg_c, seg)       \
0081         | IO_STATE (R_MMU_CONFIG, seg_b, seg)       \
0082         | IO_STATE (R_MMU_CONFIG, seg_a, seg)       \
0083         | IO_STATE (R_MMU_CONFIG, seg_9, page)      \
0084         | IO_STATE (R_MMU_CONFIG, seg_8, page)      \
0085         | IO_STATE (R_MMU_CONFIG, seg_7, page)      \
0086         | IO_STATE (R_MMU_CONFIG, seg_6, seg)       \
0087         | IO_STATE (R_MMU_CONFIG, seg_5, seg)       \
0088         | IO_STATE (R_MMU_CONFIG, seg_4, seg)       \
0089         | IO_STATE (R_MMU_CONFIG, seg_3, page)      \
0090         | IO_STATE (R_MMU_CONFIG, seg_2, page)      \
0091         | IO_STATE (R_MMU_CONFIG, seg_1, page)      \
0092         | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
0093     move.d  $r0, [R_MMU_CONFIG]
0094 #else
0095     ; kseg mappings
0096     move.d    IO_FIELD (R_MMU_KBASE_HI, base_e, 8)      \
0097         | IO_FIELD (R_MMU_KBASE_HI, base_c, 4)      \
0098         | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
0099     move.d  $r0, [R_MMU_KBASE_HI]
0100 
0101     ; temporary map of 0x40->0x40 and 0x00->0x00
0102     move.d    IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
0103     move.d  $r0, [R_MMU_KBASE_LO]
0104 
0105     ; mmu enable, segs f,e,c,b,4,0 segment mapped
0106     move.d    IO_STATE (R_MMU_CONFIG, mmu_enable, enable)   \
0107         | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
0108         | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
0109         | IO_STATE (R_MMU_CONFIG, we_excp, enable)  \
0110         | IO_STATE (R_MMU_CONFIG, seg_f, seg)       \
0111         | IO_STATE (R_MMU_CONFIG, seg_e, seg)       \
0112         | IO_STATE (R_MMU_CONFIG, seg_d, page)      \
0113         | IO_STATE (R_MMU_CONFIG, seg_c, seg)       \
0114         | IO_STATE (R_MMU_CONFIG, seg_b, seg)       \
0115         | IO_STATE (R_MMU_CONFIG, seg_a, page)      \
0116         | IO_STATE (R_MMU_CONFIG, seg_9, page)      \
0117         | IO_STATE (R_MMU_CONFIG, seg_8, page)      \
0118         | IO_STATE (R_MMU_CONFIG, seg_7, page)      \
0119         | IO_STATE (R_MMU_CONFIG, seg_6, page)      \
0120         | IO_STATE (R_MMU_CONFIG, seg_5, page)      \
0121         | IO_STATE (R_MMU_CONFIG, seg_4, seg)       \
0122         | IO_STATE (R_MMU_CONFIG, seg_3, page)      \
0123         | IO_STATE (R_MMU_CONFIG, seg_2, page)      \
0124         | IO_STATE (R_MMU_CONFIG, seg_1, page)      \
0125         | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
0126     move.d  $r0, [R_MMU_CONFIG]
0127 #endif
0128 
0129     ;; Now we need to sort out the segments and their locations in RAM or
0130     ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
0131     ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
0132     ;; But the linker has linked the kernel to expect this layout in
0133     ;; DRAM memory:
0134     ;; 1) kernel text, 2) kernel data, 3) kernel BSS
0135     ;; (the location of the ROM filesystem is determined by the krom driver)
0136     ;; If we boot this from Flash, we want to keep the ROM filesystem in
0137     ;; the flash, we want to copy the text and need to copy the data to DRAM.
0138     ;; But if we boot from DRAM, we need to move the ROMFS image
0139     ;; from its position after kernel data, to after kernel BSS, BEFORE the
0140     ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
0141     ;;
0142     ;; In both cases, we start in un-cached mode, and need to jump into a
0143     ;; cached PC after we're done fiddling around with the segments.
0144     ;;
0145     ;; arch/etrax100/etrax100.ld sets some symbols that define the start
0146     ;; and end of each segment.
0147 
0148     ;; Check if we start from DRAM or FLASH by testing PC
0149 
0150     move.d  $pc,$r0
0151     and.d   0x7fffffff,$r0  ; get rid of the non-cache bit
0152     cmp.d   0x10000,$r0 ; arbitrary... just something above this code
0153     blo _inflash0
0154     nop
0155 
0156     jump    _inram      ; enter cached ram
0157 
0158     ;; Jumpgate for branches.
0159 _inflash0:
0160     jump    _inflash
0161 
0162     ;; Put this in a suitable section where we can reclaim storage
0163     ;; after init.
0164     __INIT
0165 _inflash:
0166 #ifdef CONFIG_ETRAX_ETHERNET
0167     ;; Start MII clock to make sure it is running when tranceiver is reset
0168     move.d START_ETHERNET_CLOCK, $r0
0169     move.d $r0, [R_NETWORK_GEN_CONFIG]
0170 #endif
0171 
0172     ;; Set up waitstates etc according to kernel configuration.
0173     move.d   CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
0174     move.d   $r0, [R_WAITSTATES]
0175 
0176     move.d   CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
0177     move.d   $r0, [R_BUS_CONFIG]
0178 
0179     ;; We need to initialze DRAM registers before we start using the DRAM
0180 
0181     cmp.d   RAM_INIT_MAGIC, $r8 ; Already initialized?
0182     beq _dram_init_finished
0183     nop
0184 
0185 #include "../lib/dram_init.S"
0186 
0187 _dram_init_finished:
0188     ;; Copy text+data to DRAM
0189     ;; This is fragile - the calculation of r4 as the image size depends
0190     ;; on that the labels below actually are the first and last positions
0191     ;; in the linker-script.
0192     ;;
0193     ;; Then the locating of the cramfs image depends on the aforementioned
0194     ;; image being located in the flash at 0. This is most often not true,
0195     ;; thus the following does not work (normally there is a rescue-block
0196     ;; between the physical start of the flash and the flash-image start,
0197     ;; and when run with compression, the kernel is actually unpacked to
0198     ;; DRAM and we never get here in the first place :))
0199 
0200     moveq   0, $r0          ; source
0201     move.d  text_start, $r1     ; destination
0202     move.d  __vmlinux_end, $r2  ; end destination
0203     move.d  $r2, $r4
0204     sub.d   $r1, $r4        ; r4=__vmlinux_end in flash, used below
0205 1:  move.w  [$r0+], $r3
0206     move.w  $r3, [$r1+]
0207     cmp.d   $r2, $r1
0208     blo 1b
0209     nop
0210 
0211     ;; We keep the cramfs in the flash.
0212     ;; There might be none, but that does not matter because
0213     ;; we don't do anything than read some bytes here.
0214 
0215     moveq   0, $r0
0216     move.d  $r0, [romfs_length] ; default if there is no cramfs
0217 
0218     move.d  [$r4], $r0  ; cramfs_super.magic
0219     cmp.d   CRAMFS_MAGIC, $r0
0220     bne 1f
0221     nop
0222     move.d  [$r4 + 4], $r0  ; cramfs_super.size
0223     move.d  $r0, [romfs_length]
0224 #ifdef CONFIG_CRIS_LOW_MAP
0225     add.d   0x50000000, $r4 ; add flash start in virtual memory (cached)
0226 #else
0227     add.d   0xf0000000, $r4 ; add flash start in virtual memory (cached)
0228 #endif
0229     move.d  $r4, [romfs_start]
0230 1:
0231     moveq   1, $r0
0232     move.d  $r0, [romfs_in_flash]
0233 
0234     jump    _start_it   ; enter code, cached this time
0235 
0236 _inram:
0237     ;; Move the ROM fs to after BSS end. This assumes that the cramfs
0238     ;; second longword contains the length of the cramfs
0239 
0240     moveq   0, $r0
0241     move.d  $r0, [romfs_length] ; default if there is no cramfs
0242 
0243     ;; The kernel could have been unpacked to DRAM by the loader, but
0244     ;; the cramfs image could still be in the Flash directly after the
0245     ;; compressed kernel image. The loader passes the address of the
0246     ;; byte succeeding the last compressed byte in the flash in the
0247     ;; register r9 when starting the kernel. Check if r9 points to a
0248     ;; decent cramfs image!
0249     ;; (Notice that if this is not booted from the loader, r9 will be
0250     ;;  garbage but we do sanity checks on it, the chance that it points
0251     ;;  to a cramfs magic is small.. )
0252 
0253     cmp.d   0x0ffffff8, $r9
0254     bhs _no_romfs_in_flash  ; r9 points outside the flash area
0255     nop
0256     move.d  [$r9], $r0  ; cramfs_super.magic
0257     cmp.d   CRAMFS_MAGIC, $r0
0258     bne _no_romfs_in_flash
0259     nop
0260     move.d  [$r9+4], $r0    ; cramfs_super.length
0261     move.d  $r0, [romfs_length]
0262 #ifdef CONFIG_CRIS_LOW_MAP
0263     add.d   0x50000000, $r9 ; add flash start in virtual memory (cached)
0264 #else
0265     add.d   0xf0000000, $r9 ; add flash start in virtual memory (cached)
0266 #endif
0267     move.d  $r9, [romfs_start]
0268 
0269     moveq   1, $r0
0270     move.d  $r0, [romfs_in_flash]
0271 
0272     jump    _start_it   ; enter code, cached this time
0273 
0274 _no_romfs_in_flash:
0275 
0276     ;; Check if there is a cramfs (magic value).
0277     ;; Notice that we check for cramfs magic value - which is
0278     ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
0279     ;; not need this mechanism anyway)
0280 
0281     move.d  __init_end, $r0; the image will be after the end of init
0282     move.d  [$r0], $r1  ; cramfs assumes same endian on host/target
0283     cmp.d   CRAMFS_MAGIC, $r1; magic value in cramfs superblock
0284     bne 2f
0285     nop
0286 
0287     ;; Ok. What is its size ?
0288 
0289     move.d  [$r0 + 4], $r2  ; cramfs_super.size (again, no need to swapwb)
0290 
0291     ;; We want to copy it to the end of the BSS
0292 
0293     move.d  _end, $r1
0294 
0295     ;; Remember values so cramfs and setup can find this info
0296 
0297     move.d  $r1, [romfs_start]  ; new romfs location
0298     move.d  $r2, [romfs_length]
0299 
0300     ;; We need to copy it backwards, since they can be overlapping
0301 
0302     add.d   $r2, $r0
0303     add.d   $r2, $r1
0304 
0305     ;; Go ahead. Make my loop.
0306 
0307     lsrq    1, $r2      ; size is in bytes, we copy words
0308 
0309 1:  move.w  [$r0=$r0-2],$r3
0310     move.w  $r3,[$r1=$r1-2]
0311     subq    1, $r2
0312     bne 1b
0313     nop
0314 
0315 2:
0316     ;; Dont worry that the BSS is tainted. It will be cleared later.
0317 
0318     moveq   0, $r0
0319     move.d  $r0, [romfs_in_flash]
0320 
0321     jump    _start_it   ; better skip the additional cramfs check below
0322 
0323 _start_it:
0324 
0325     ;; Check if kernel command line is supplied
0326     cmp.d   COMMAND_LINE_MAGIC, $r10
0327     bne no_command_line
0328     nop
0329 
0330     move.d  256, $r13
0331     move.d  cris_command_line, $r10
0332     or.d    0x80000000, $r11 ; Make it virtual
0333 1:
0334     move.b  [$r11+], $r12
0335     move.b  $r12, [$r10+]
0336     subq    1, $r13
0337     bne 1b
0338     nop
0339 
0340 no_command_line:
0341 
0342     ;; the kernel stack is overlayed with the task structure for each
0343     ;; task. thus the initial kernel stack is in the same page as the
0344     ;; init_task (but starts in the top of the page, size 8192)
0345     move.d  init_thread_union + 8192, $sp
0346     move.d  ibr_start,$r0   ; this symbol is set by the linker script 
0347     move    $r0,$ibr
0348     move.d  $r0,[etrax_irv] ; set the interrupt base register and pointer
0349 
0350     ;; Clear BSS region, from _bss_start to _end
0351 
0352     move.d  __bss_start, $r0
0353     move.d  _end, $r1
0354 1:  clear.d [$r0+]
0355     cmp.d   $r1, $r0
0356     blo 1b
0357     nop
0358 
0359     ;; Etrax product HW genconfig setup
0360 
0361     moveq   0,$r0
0362 
0363     ;; Select or disable serial port 2
0364 #ifdef CONFIG_ETRAX_SERIAL_PORT2
0365     or.d      IO_STATE (R_GEN_CONFIG, ser2, select),$r0
0366 #else
0367     or.d      IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
0368 #endif
0369 
0370     ;; Init interfaces (disable them).
0371     or.d      IO_STATE (R_GEN_CONFIG, scsi0, disable) \
0372         | IO_STATE (R_GEN_CONFIG, ata, disable) \
0373         | IO_STATE (R_GEN_CONFIG, par0, disable) \
0374         | IO_STATE (R_GEN_CONFIG, mio, disable) \
0375         | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
0376         | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
0377         | IO_STATE (R_GEN_CONFIG, par1, disable) \
0378         | IO_STATE (R_GEN_CONFIG, ser3, disable) \
0379         | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
0380         | IO_STATE (R_GEN_CONFIG, usb1, disable) \
0381         | IO_STATE (R_GEN_CONFIG, usb2, disable) \
0382         | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
0383 
0384     ;; Init DMA channel muxing (set to unused clients).
0385     or.d      IO_STATE (R_GEN_CONFIG, dma2, ata)    \
0386         | IO_STATE (R_GEN_CONFIG, dma3, ata) \
0387         | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
0388         | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
0389         | IO_STATE (R_GEN_CONFIG, dma6, unused) \
0390         | IO_STATE (R_GEN_CONFIG, dma7, unused) \
0391         | IO_STATE (R_GEN_CONFIG, dma8, usb) \
0392         | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
0393 
0394 
0395     move.d  $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
0396 
0397     move.d  $r0,[R_GEN_CONFIG]
0398 
0399 #if 0
0400     moveq   4,$r0
0401     move.b  $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
0402     move.b  $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
0403 1:  move.b  [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
0404     and.b   7,$r0
0405     cmp.b   4,$r0
0406     beq 1b
0407     nop
0408 1:  move.b  [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
0409     and.b   7,$r0
0410     cmp.b   4,$r0
0411     beq 1b
0412     nop
0413 #endif
0414 
0415     moveq   IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
0416     move.b  $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
0417     move.b  $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
0418 1:  move.b  [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
0419     andq    IO_MASK (R_DMA_CH8_CMD, cmd),$r0
0420     cmpq    IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
0421     beq 1b
0422     nop
0423 1:  move.b  [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
0424     andq    IO_MASK (R_DMA_CH9_CMD, cmd),$r0
0425     cmpq    IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
0426     beq 1b
0427     nop
0428 
0429     ;; setup port PA and PB default initial directions and data
0430     ;; including their shadow registers
0431 
0432     move.b  CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
0433     move.b  $r0,[port_pa_dir_shadow]
0434     move.b  $r0,[R_PORT_PA_DIR]
0435     move.b  CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
0436     move.b  $r0,[port_pa_data_shadow]
0437     move.b  $r0,[R_PORT_PA_DATA]
0438 
0439     move.b  CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
0440     move.b  $r0,[port_pb_config_shadow]
0441     move.b  $r0,[R_PORT_PB_CONFIG]
0442     move.b  CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
0443     move.b  $r0,[port_pb_dir_shadow]
0444     move.b  $r0,[R_PORT_PB_DIR]
0445     move.b  CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
0446     move.b  $r0,[port_pb_data_shadow]
0447     move.b  $r0,[R_PORT_PB_DATA]
0448 
0449     moveq   0, $r0
0450     move.d  $r0,[port_pb_i2c_shadow]
0451     move.d  $r0, [R_PORT_PB_I2C]
0452 
0453     moveq   0,$r0
0454     move.d  $r0,[port_g_data_shadow]
0455     move.d  $r0,[R_PORT_G_DATA]
0456 
0457     ;; setup the serial port 0 at 115200 baud for debug purposes
0458 
0459     moveq     IO_STATE (R_SERIAL0_XOFF, tx_stop, enable)        \
0460         | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable)     \
0461         | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
0462     move.d  $r0,[R_SERIAL0_XOFF]
0463 
0464     ; 115.2kbaud for both transmit and receive
0465     move.b    IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz)      \
0466         | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
0467     move.b  $r0,[R_SERIAL0_BAUD]
0468 
0469     ; Set up and enable the serial0 receiver.
0470     move.b    IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop)      \
0471         | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
0472         | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active)       \
0473         | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle)   \
0474         | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal)  \
0475         | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even)      \
0476         | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable)    \
0477         | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
0478     move.b  $r0,[R_SERIAL0_REC_CTRL]
0479 
0480     ; Set up and enable the serial0 transmitter.
0481     move.b    IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0)          \
0482         | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable)   \
0483         | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled)  \
0484         | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit)  \
0485         | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal)    \
0486         | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even)        \
0487         | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable)  \
0488         | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
0489     move.b  $r0,[R_SERIAL0_TR_CTRL]
0490 
0491     ;; setup the serial port 1 at 115200 baud for debug purposes
0492 
0493     moveq     IO_STATE (R_SERIAL1_XOFF, tx_stop, enable)        \
0494         | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable)     \
0495         | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
0496     move.d  $r0,[R_SERIAL1_XOFF]
0497 
0498     ; 115.2kbaud for both transmit and receive
0499     move.b    IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz)      \
0500         | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
0501     move.b  $r0,[R_SERIAL1_BAUD]
0502 
0503     ; Set up and enable the serial1 receiver.
0504     move.b    IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop)      \
0505         | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
0506         | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active)       \
0507         | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle)   \
0508         | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal)  \
0509         | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even)      \
0510         | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable)    \
0511         | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
0512     move.b  $r0,[R_SERIAL1_REC_CTRL]
0513 
0514     ; Set up and enable the serial1 transmitter.
0515     move.b    IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0)          \
0516         | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable)   \
0517         | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled)  \
0518         | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit)  \
0519         | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal)    \
0520         | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even)        \
0521         | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable)  \
0522         | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
0523     move.b  $r0,[R_SERIAL1_TR_CTRL]
0524 
0525 #ifdef CONFIG_ETRAX_SERIAL_PORT2
0526     ;; setup the serial port 2 at 115200 baud for debug purposes
0527 
0528     moveq     IO_STATE (R_SERIAL2_XOFF, tx_stop, enable)        \
0529         | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable)     \
0530         | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
0531     move.d  $r0,[R_SERIAL2_XOFF]
0532 
0533     ; 115.2kbaud for both transmit and receive
0534     move.b    IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz)      \
0535         | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
0536     move.b  $r0,[R_SERIAL2_BAUD]
0537 
0538     ; Set up and enable the serial2 receiver.
0539     move.b    IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop)      \
0540         | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
0541         | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active)       \
0542         | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle)   \
0543         | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal)  \
0544         | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even)      \
0545         | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable)    \
0546         | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
0547     move.b  $r0,[R_SERIAL2_REC_CTRL]
0548 
0549     ; Set up and enable the serial2 transmitter.
0550     move.b    IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0)          \
0551         | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable)   \
0552         | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled)  \
0553         | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit)  \
0554         | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal)    \
0555         | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even)        \
0556         | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable)  \
0557         | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
0558     move.b  $r0,[R_SERIAL2_TR_CTRL]
0559 #endif
0560 
0561 #ifdef CONFIG_ETRAX_SERIAL_PORT3
0562     ;; setup the serial port 3 at 115200 baud for debug purposes
0563 
0564     moveq     IO_STATE (R_SERIAL3_XOFF, tx_stop, enable)        \
0565         | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable)     \
0566         | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
0567     move.d  $r0,[R_SERIAL3_XOFF]
0568 
0569     ; 115.2kbaud for both transmit and receive
0570     move.b    IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz)      \
0571         | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
0572     move.b  $r0,[R_SERIAL3_BAUD]
0573 
0574     ; Set up and enable the serial3 receiver.
0575     move.b    IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop)      \
0576         | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
0577         | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active)       \
0578         | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle)   \
0579         | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal)  \
0580         | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even)      \
0581         | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable)    \
0582         | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
0583     move.b  $r0,[R_SERIAL3_REC_CTRL]
0584 
0585     ; Set up and enable the serial3 transmitter.
0586     move.b    IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0)          \
0587         | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable)   \
0588         | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled)  \
0589         | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit)  \
0590         | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal)    \
0591         | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even)        \
0592         | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable)  \
0593         | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
0594     move.b  $r0,[R_SERIAL3_TR_CTRL]
0595 #endif
0596 
0597     jump    start_kernel    ; jump into the C-function start_kernel in init/main.c
0598 
0599     .data
0600 etrax_irv:
0601     .dword  0
0602 romfs_start:
0603     .dword  0
0604 romfs_length:
0605     .dword  0
0606 romfs_in_flash:
0607     .dword  0
0608 
0609     ;; put some special pages at the beginning of the kernel aligned
0610     ;; to page boundaries - the kernel cannot start until after this
0611 
0612 #ifdef CONFIG_CRIS_LOW_MAP
0613 swapper_pg_dir = 0x60002000
0614 #else
0615 swapper_pg_dir = 0xc0002000
0616 #endif
0617 
0618     .section ".init.data", "aw"
0619 #include "../lib/hw_settings.S"