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0001 ;
0002 ;  Port on Texas Instruments TMS320C6x architecture
0003 ;
0004 ;  Copyright (C) 2004-2011 Texas Instruments Incorporated
0005 ;  Author: Aurelien Jacquiot (aurelien.jacquiot@virtuallogix.com)
0006 ;  Updated for 2.6.34: Mark Salter <msalter@redhat.com>
0007 ;
0008 ;  This program is free software; you can redistribute it and/or modify
0009 ;  it under the terms of the GNU General Public License version 2 as
0010 ;  published by the Free Software Foundation.
0011 ;
0012 
0013 #include <linux/sys.h>
0014 #include <linux/linkage.h>
0015 #include <asm/thread_info.h>
0016 #include <asm/asm-offsets.h>
0017 #include <asm/unistd.h>
0018 #include <asm/errno.h>
0019 
0020 ; Registers naming
0021 #define DP  B14
0022 #define SP  B15
0023 
0024 #ifndef CONFIG_PREEMPT
0025 #define resume_kernel restore_all
0026 #endif
0027 
0028     .altmacro
0029 
0030     .macro MASK_INT reg
0031     MVC .S2 CSR,reg
0032     CLR .S2 reg,0,0,reg
0033     MVC .S2 reg,CSR
0034     .endm
0035 
0036     .macro UNMASK_INT reg
0037     MVC .S2 CSR,reg
0038     SET .S2 reg,0,0,reg
0039     MVC .S2 reg,CSR
0040     .endm
0041 
0042     .macro GET_THREAD_INFO reg
0043     SHR .S1X    SP,THREAD_SHIFT,reg
0044     SHL .S1 reg,THREAD_SHIFT,reg
0045     .endm
0046 
0047     ;;
0048     ;;  This defines the normal kernel pt_regs layout.
0049     ;;
0050     .macro SAVE_ALL __rp __tsr
0051     STW .D2T2   B0,*SP--[2]     ; save original B0
0052     MVKL    .S2 current_ksp,B0
0053     MVKH    .S2 current_ksp,B0
0054     LDW .D2T2   *B0,B1          ; KSP
0055 
0056     NOP 3
0057     STW .D2T2   B1,*+SP[1]      ; save original B1
0058     XOR .D2 SP,B1,B0        ; (SP ^ KSP)
0059     LDW .D2T2   *+SP[1],B1      ; restore B0/B1
0060     LDW .D2T2   *++SP[2],B0
0061     SHR .S2 B0,THREAD_SHIFT,B0  ; 0 if already using kstack
0062   [B0]  STDW    .D2T2   SP:DP,*--B1[1]      ; user: save user sp/dp kstack
0063   [B0]  MV  .S2 B1,SP           ;    and switch to kstack
0064 ||[!B0] STDW    .D2T2   SP:DP,*--SP[1]      ; kernel: save on current stack
0065 
0066     SUBAW   .D2 SP,2,SP
0067 
0068     ADD .D1X    SP,-8,A15
0069  || STDW    .D2T1   A15:A14,*SP--[16]   ; save A15:A14
0070 
0071     STDW    .D2T2   B13:B12,*SP--[1]
0072  || STDW    .D1T1   A13:A12,*A15--[1]
0073  || MVC .S2 __rp,B13
0074 
0075     STDW    .D2T2   B11:B10,*SP--[1]
0076  || STDW    .D1T1   A11:A10,*A15--[1]
0077  || MVC .S2 CSR,B12
0078 
0079     STDW    .D2T2   B9:B8,*SP--[1]
0080  || STDW    .D1T1   A9:A8,*A15--[1]
0081  || MVC .S2 RILC,B11
0082     STDW    .D2T2   B7:B6,*SP--[1]
0083  || STDW    .D1T1   A7:A6,*A15--[1]
0084  || MVC .S2 ILC,B10
0085 
0086     STDW    .D2T2   B5:B4,*SP--[1]
0087  || STDW    .D1T1   A5:A4,*A15--[1]
0088 
0089     STDW    .D2T2   B3:B2,*SP--[1]
0090  || STDW    .D1T1   A3:A2,*A15--[1]
0091  || MVC .S2 __tsr,B5
0092 
0093     STDW    .D2T2   B1:B0,*SP--[1]
0094  || STDW    .D1T1   A1:A0,*A15--[1]
0095  || MV  .S1X    B5,A5
0096 
0097     STDW    .D2T2   B31:B30,*SP--[1]
0098  || STDW    .D1T1   A31:A30,*A15--[1]
0099     STDW    .D2T2   B29:B28,*SP--[1]
0100  || STDW    .D1T1   A29:A28,*A15--[1]
0101     STDW    .D2T2   B27:B26,*SP--[1]
0102  || STDW    .D1T1   A27:A26,*A15--[1]
0103     STDW    .D2T2   B25:B24,*SP--[1]
0104  || STDW    .D1T1   A25:A24,*A15--[1]
0105     STDW    .D2T2   B23:B22,*SP--[1]
0106  || STDW    .D1T1   A23:A22,*A15--[1]
0107     STDW    .D2T2   B21:B20,*SP--[1]
0108  || STDW    .D1T1   A21:A20,*A15--[1]
0109     STDW    .D2T2   B19:B18,*SP--[1]
0110  || STDW    .D1T1   A19:A18,*A15--[1]
0111     STDW    .D2T2   B17:B16,*SP--[1]
0112  || STDW    .D1T1   A17:A16,*A15--[1]
0113 
0114     STDW    .D2T2   B13:B12,*SP--[1]    ; save PC and CSR
0115 
0116     STDW    .D2T2   B11:B10,*SP--[1]    ; save RILC and ILC
0117     STDW    .D2T1   A5:A4,*SP--[1]      ; save TSR and orig A4
0118 
0119     ;; We left an unused word on the stack just above pt_regs.
0120     ;; It is used to save whether or not this frame is due to
0121     ;; a syscall. It is cleared here, but the syscall handler
0122     ;; sets it to a non-zero value.
0123     MVK .L2 0,B1
0124     STW .D2T2   B1,*+SP(REGS__END+8)    ; clear syscall flag
0125     .endm
0126 
0127     .macro RESTORE_ALL __rp __tsr
0128     LDDW    .D2T2   *++SP[1],B9:B8      ; get TSR (B9)
0129     LDDW    .D2T2   *++SP[1],B11:B10    ; get RILC (B11) and ILC (B10)
0130     LDDW    .D2T2   *++SP[1],B13:B12    ; get PC (B13) and CSR (B12)
0131 
0132     ADDAW   .D1X    SP,30,A15
0133 
0134     LDDW    .D1T1   *++A15[1],A17:A16
0135  || LDDW    .D2T2   *++SP[1],B17:B16
0136     LDDW    .D1T1   *++A15[1],A19:A18
0137  || LDDW    .D2T2   *++SP[1],B19:B18
0138     LDDW    .D1T1   *++A15[1],A21:A20
0139  || LDDW    .D2T2   *++SP[1],B21:B20
0140     LDDW    .D1T1   *++A15[1],A23:A22
0141  || LDDW    .D2T2   *++SP[1],B23:B22
0142     LDDW    .D1T1   *++A15[1],A25:A24
0143  || LDDW    .D2T2   *++SP[1],B25:B24
0144     LDDW    .D1T1   *++A15[1],A27:A26
0145  || LDDW    .D2T2   *++SP[1],B27:B26
0146     LDDW    .D1T1   *++A15[1],A29:A28
0147  || LDDW    .D2T2   *++SP[1],B29:B28
0148     LDDW    .D1T1   *++A15[1],A31:A30
0149  || LDDW    .D2T2   *++SP[1],B31:B30
0150 
0151     LDDW    .D1T1   *++A15[1],A1:A0
0152  || LDDW    .D2T2   *++SP[1],B1:B0
0153 
0154     LDDW    .D1T1   *++A15[1],A3:A2
0155  || LDDW    .D2T2   *++SP[1],B3:B2
0156  || MVC .S2 B9,__tsr
0157     LDDW    .D1T1   *++A15[1],A5:A4
0158  || LDDW    .D2T2   *++SP[1],B5:B4
0159  || MVC .S2 B11,RILC
0160     LDDW    .D1T1   *++A15[1],A7:A6
0161  || LDDW    .D2T2   *++SP[1],B7:B6
0162  || MVC .S2 B10,ILC
0163 
0164     LDDW    .D1T1   *++A15[1],A9:A8
0165  || LDDW    .D2T2   *++SP[1],B9:B8
0166  || MVC .S2 B13,__rp
0167 
0168     LDDW    .D1T1   *++A15[1],A11:A10
0169  || LDDW    .D2T2   *++SP[1],B11:B10
0170  || MVC .S2 B12,CSR
0171 
0172     LDDW    .D1T1   *++A15[1],A13:A12
0173  || LDDW    .D2T2   *++SP[1],B13:B12
0174 
0175     MV  .D2X    A15,SP
0176  || MVKL    .S1 current_ksp,A15
0177     MVKH    .S1 current_ksp,A15
0178  || ADDAW   .D1X    SP,6,A14
0179     STW .D1T1   A14,*A15    ; save kernel stack pointer
0180 
0181     LDDW    .D2T1   *++SP[1],A15:A14
0182 
0183     B   .S2 __rp        ; return from interruption
0184     LDDW    .D2T2   *+SP[1],SP:DP
0185     NOP 4
0186     .endm
0187 
0188     .section .text
0189 
0190     ;;
0191     ;; Jump to schedule() then return to ret_from_exception
0192     ;;
0193 _reschedule:
0194 #ifdef CONFIG_C6X_BIG_KERNEL
0195     MVKL    .S1 schedule,A0
0196     MVKH    .S1 schedule,A0
0197     B   .S2X    A0
0198 #else
0199     B   .S1 schedule
0200 #endif
0201     ADDKPC  .S2 ret_from_exception,B3,4
0202 
0203     ;;
0204     ;; Called before syscall handler when process is being debugged
0205     ;;
0206 tracesys_on:
0207 #ifdef CONFIG_C6X_BIG_KERNEL
0208     MVKL    .S1 syscall_trace_entry,A0
0209     MVKH    .S1 syscall_trace_entry,A0
0210     B   .S2X    A0
0211 #else
0212     B   .S1 syscall_trace_entry
0213 #endif
0214     ADDKPC  .S2 ret_from_syscall_trace,B3,3
0215     ADD .S1X    8,SP,A4
0216 
0217 ret_from_syscall_trace:
0218     ;; tracing returns (possibly new) syscall number
0219     MV  .D2X    A4,B0
0220  || MVK .S2 __NR_syscalls,B1
0221     CMPLTU  .L2 B0,B1,B1
0222 
0223  [!B1]  BNOP    .S2 ret_from_syscall_function,5
0224  || MVK .S1 -ENOSYS,A4
0225 
0226     ;; reload syscall args from (possibly modified) stack frame
0227     ;; and get syscall handler addr from sys_call_table:
0228     LDW .D2T2   *+SP(REGS_B4+8),B4
0229  || MVKL    .S2 sys_call_table,B1
0230     LDW .D2T1   *+SP(REGS_A6+8),A6
0231  || MVKH    .S2 sys_call_table,B1
0232     LDW .D2T2   *+B1[B0],B0
0233  || MVKL    .S2 ret_from_syscall_function,B3
0234     LDW .D2T2   *+SP(REGS_B6+8),B6
0235  || MVKH    .S2 ret_from_syscall_function,B3
0236     LDW .D2T1   *+SP(REGS_A8+8),A8
0237     LDW .D2T2   *+SP(REGS_B8+8),B8
0238     NOP
0239     ; B0 = sys_call_table[__NR_*]
0240     BNOP    .S2 B0,5            ; branch to syscall handler
0241  || LDW .D2T1   *+SP(REGS_ORIG_A4+8),A4
0242 
0243 syscall_exit_work:
0244     AND .D1 _TIF_SYSCALL_TRACE,A2,A0
0245  [!A0]  BNOP    .S1 work_pending,5
0246  [A0]   B   .S2 syscall_trace_exit
0247     ADDKPC  .S2 resume_userspace,B3,1
0248     MVC .S2 CSR,B1
0249     SET .S2 B1,0,0,B1
0250     MVC .S2 B1,CSR      ; enable ints
0251 
0252 work_pending:
0253     AND .D1 _TIF_NEED_RESCHED,A2,A0
0254  [!A0]  BNOP    .S1 work_notifysig,5
0255 
0256 work_resched:
0257 #ifdef CONFIG_C6X_BIG_KERNEL
0258     MVKL    .S1 schedule,A1
0259     MVKH    .S1 schedule,A1
0260     B   .S2X    A1
0261 #else
0262     B   .S2 schedule
0263 #endif
0264     ADDKPC  .S2 work_rescheduled,B3,4
0265 work_rescheduled:
0266     ;; make sure we don't miss an interrupt setting need_resched or
0267     ;; sigpending between sampling and the rti
0268     MASK_INT B2
0269     GET_THREAD_INFO A12
0270     LDW .D1T1   *+A12(THREAD_INFO_FLAGS),A2
0271     MVK .S1 _TIF_WORK_MASK,A1
0272     MVK .S1 _TIF_NEED_RESCHED,A3
0273     NOP 2
0274     AND .D1 A1,A2,A0
0275  || AND .S1 A3,A2,A1
0276  [!A0]  BNOP    .S1 restore_all,5
0277  [A1]   BNOP    .S1 work_resched,5
0278 
0279 work_notifysig:
0280     ;; enable interrupts for do_notify_resume()
0281     UNMASK_INT B2
0282     B   .S2 do_notify_resume
0283     LDW .D2T1   *+SP(REGS__END+8),A6 ; syscall flag
0284     ADDKPC  .S2 resume_userspace,B3,1
0285     ADD .S1X    8,SP,A4     ; pt_regs pointer is first arg
0286     MV  .D2X    A2,B4       ; thread_info flags is second arg
0287 
0288     ;;
0289     ;; On C64x+, the return way from exception and interrupt
0290     ;; is a little bit different
0291     ;;
0292 ENTRY(ret_from_exception)
0293 #ifdef CONFIG_PREEMPT
0294     MASK_INT B2
0295 #endif
0296 
0297 ENTRY(ret_from_interrupt)
0298     ;;
0299     ;; Check if we are comming from user mode.
0300     ;;
0301     LDW .D2T2   *+SP(REGS_TSR+8),B0
0302     MVK .S2 0x40,B1
0303     NOP 3
0304     AND .D2 B0,B1,B0
0305  [!B0]  BNOP    .S2 resume_kernel,5
0306 
0307 resume_userspace:
0308     ;; make sure we don't miss an interrupt setting need_resched or
0309     ;; sigpending between sampling and the rti
0310     MASK_INT B2
0311     GET_THREAD_INFO A12
0312     LDW .D1T1   *+A12(THREAD_INFO_FLAGS),A2
0313     MVK .S1 _TIF_WORK_MASK,A1
0314     MVK .S1 _TIF_NEED_RESCHED,A3
0315     NOP 2
0316     AND .D1 A1,A2,A0
0317  [A0]   BNOP    .S1 work_pending,5
0318     BNOP    .S1 restore_all,5
0319 
0320     ;;
0321     ;; System call handling
0322     ;; B0 = syscall number (in sys_call_table)
0323     ;; A4,B4,A6,B6,A8,B8 = arguments of the syscall function
0324     ;; A4 is the return value register
0325     ;;
0326 system_call_saved:
0327     MVK .L2 1,B2
0328     STW .D2T2   B2,*+SP(REGS__END+8)    ; set syscall flag
0329     MVC .S2 B2,ECR          ; ack the software exception
0330 
0331     UNMASK_INT B2           ; re-enable global IT
0332 
0333 system_call_saved_noack:
0334     ;; Check system call number
0335     MVK .S2 __NR_syscalls,B1
0336 #ifdef CONFIG_C6X_BIG_KERNEL
0337  || MVKL    .S1 sys_ni_syscall,A0
0338 #endif
0339     CMPLTU  .L2 B0,B1,B1
0340 #ifdef CONFIG_C6X_BIG_KERNEL
0341  || MVKH    .S1 sys_ni_syscall,A0
0342 #endif
0343 
0344     ;; Check for ptrace
0345     GET_THREAD_INFO A12
0346 
0347 #ifdef CONFIG_C6X_BIG_KERNEL
0348  [!B1]  B   .S2X    A0
0349 #else
0350  [!B1]  B   .S2 sys_ni_syscall
0351 #endif
0352  [!B1]  ADDKPC  .S2 ret_from_syscall_function,B3,4
0353 
0354     ;; Get syscall handler addr from sys_call_table
0355     ;; call tracesys_on or call syscall handler
0356     LDW .D1T1   *+A12(THREAD_INFO_FLAGS),A2
0357  || MVKL    .S2 sys_call_table,B1
0358     MVKH    .S2 sys_call_table,B1
0359     LDW .D2T2   *+B1[B0],B0
0360     NOP 2
0361     ; A2 = thread_info flags
0362     AND .D1 _TIF_SYSCALL_TRACE,A2,A2
0363  [A2]   BNOP    .S1 tracesys_on,5
0364     ;; B0 = _sys_call_table[__NR_*]
0365     B   .S2 B0
0366     ADDKPC  .S2 ret_from_syscall_function,B3,4
0367 
0368 ret_from_syscall_function:
0369     STW .D2T1   A4,*+SP(REGS_A4+8)  ; save return value in A4
0370                         ; original A4 is in orig_A4
0371 syscall_exit:
0372     ;; make sure we don't miss an interrupt setting need_resched or
0373     ;; sigpending between sampling and the rti
0374     MASK_INT B2
0375     LDW .D1T1   *+A12(THREAD_INFO_FLAGS),A2
0376     MVK .S1 _TIF_ALLWORK_MASK,A1
0377     NOP 3
0378     AND .D1 A1,A2,A2 ; check for work to do
0379  [A2]   BNOP    .S1 syscall_exit_work,5
0380 
0381 restore_all:
0382     RESTORE_ALL NRP,NTSR
0383 
0384     ;;
0385     ;; After a fork we jump here directly from resume,
0386     ;; so that A4 contains the previous task structure.
0387     ;;
0388 ENTRY(ret_from_fork)
0389 #ifdef CONFIG_C6X_BIG_KERNEL
0390     MVKL    .S1 schedule_tail,A0
0391     MVKH    .S1 schedule_tail,A0
0392     B   .S2X    A0
0393 #else
0394     B   .S2 schedule_tail
0395 #endif
0396     ADDKPC  .S2 ret_from_fork_2,B3,4
0397 ret_from_fork_2:
0398     ;; return 0 in A4 for child process
0399     GET_THREAD_INFO A12
0400     BNOP    .S2 syscall_exit,3
0401     MVK .L2 0,B0
0402     STW .D2T2   B0,*+SP(REGS_A4+8)
0403 ENDPROC(ret_from_fork)
0404 
0405 ENTRY(ret_from_kernel_thread)
0406 #ifdef CONFIG_C6X_BIG_KERNEL
0407     MVKL    .S1 schedule_tail,A0
0408     MVKH    .S1 schedule_tail,A0
0409     B   .S2X    A0
0410 #else
0411     B   .S2 schedule_tail
0412 #endif
0413     LDW .D2T2   *+SP(REGS_A0+8),B10 /* get fn  */
0414     ADDKPC  .S2 0f,B3,3
0415 0:
0416     B   .S2 B10        /* call fn */
0417     LDW .D2T1   *+SP(REGS_A1+8),A4 /* get arg */
0418     ADDKPC  .S2 ret_from_fork_2,B3,3
0419 ENDPROC(ret_from_kernel_thread)
0420 
0421     ;;
0422     ;; These are the interrupt handlers, responsible for calling c6x_do_IRQ()
0423     ;;
0424     .macro SAVE_ALL_INT
0425     SAVE_ALL IRP,ITSR
0426     .endm
0427 
0428     .macro CALL_INT int
0429 #ifdef CONFIG_C6X_BIG_KERNEL
0430     MVKL    .S1 c6x_do_IRQ,A0
0431     MVKH    .S1 c6x_do_IRQ,A0
0432     BNOP    .S2X    A0,1
0433     MVK .S1 int,A4
0434     ADDAW   .D2 SP,2,B4
0435     MVKL    .S2 ret_from_interrupt,B3
0436     MVKH    .S2 ret_from_interrupt,B3
0437 #else
0438     CALLP   .S2 c6x_do_IRQ,B3
0439  || MVK .S1 int,A4
0440  || ADDAW   .D2 SP,2,B4
0441     B   .S1 ret_from_interrupt
0442     NOP 5
0443 #endif
0444     .endm
0445 
0446 ENTRY(_int4_handler)
0447     SAVE_ALL_INT
0448     CALL_INT 4
0449 ENDPROC(_int4_handler)
0450 
0451 ENTRY(_int5_handler)
0452     SAVE_ALL_INT
0453     CALL_INT 5
0454 ENDPROC(_int5_handler)
0455 
0456 ENTRY(_int6_handler)
0457     SAVE_ALL_INT
0458     CALL_INT 6
0459 ENDPROC(_int6_handler)
0460 
0461 ENTRY(_int7_handler)
0462     SAVE_ALL_INT
0463     CALL_INT 7
0464 ENDPROC(_int7_handler)
0465 
0466 ENTRY(_int8_handler)
0467     SAVE_ALL_INT
0468     CALL_INT 8
0469 ENDPROC(_int8_handler)
0470 
0471 ENTRY(_int9_handler)
0472     SAVE_ALL_INT
0473     CALL_INT 9
0474 ENDPROC(_int9_handler)
0475 
0476 ENTRY(_int10_handler)
0477     SAVE_ALL_INT
0478     CALL_INT 10
0479 ENDPROC(_int10_handler)
0480 
0481 ENTRY(_int11_handler)
0482     SAVE_ALL_INT
0483     CALL_INT 11
0484 ENDPROC(_int11_handler)
0485 
0486 ENTRY(_int12_handler)
0487     SAVE_ALL_INT
0488     CALL_INT 12
0489 ENDPROC(_int12_handler)
0490 
0491 ENTRY(_int13_handler)
0492     SAVE_ALL_INT
0493     CALL_INT 13
0494 ENDPROC(_int13_handler)
0495 
0496 ENTRY(_int14_handler)
0497     SAVE_ALL_INT
0498     CALL_INT 14
0499 ENDPROC(_int14_handler)
0500 
0501 ENTRY(_int15_handler)
0502     SAVE_ALL_INT
0503     CALL_INT 15
0504 ENDPROC(_int15_handler)
0505 
0506     ;;
0507     ;; Handler for uninitialized and spurious interrupts
0508     ;;
0509 ENTRY(_bad_interrupt)
0510     B   .S2 IRP
0511     NOP 5
0512 ENDPROC(_bad_interrupt)
0513 
0514     ;;
0515     ;; Entry for NMI/exceptions/syscall
0516     ;;
0517 ENTRY(_nmi_handler)
0518     SAVE_ALL NRP,NTSR
0519 
0520     MVC .S2 EFR,B2
0521     CMPEQ   .L2 1,B2,B2
0522  || MVC .S2 TSR,B1
0523     CLR .S2 B1,10,10,B1
0524     MVC .S2 B1,TSR
0525 #ifdef CONFIG_C6X_BIG_KERNEL
0526  [!B2]  MVKL    .S1 process_exception,A0
0527  [!B2]  MVKH    .S1 process_exception,A0
0528  [!B2]  B   .S2X    A0
0529 #else
0530  [!B2]  B   .S2 process_exception
0531 #endif
0532  [B2]   B   .S2 system_call_saved
0533  [!B2]  ADDAW   .D2 SP,2,B1
0534  [!B2]  MV  .D1X    B1,A4
0535     ADDKPC  .S2 ret_from_trap,B3,2
0536 
0537 ret_from_trap:
0538     MV  .D2X    A4,B0
0539  [!B0]  BNOP    .S2 ret_from_exception,5
0540 
0541 #ifdef CONFIG_C6X_BIG_KERNEL
0542     MVKL    .S2 system_call_saved_noack,B3
0543     MVKH    .S2 system_call_saved_noack,B3
0544 #endif
0545     LDW .D2T2   *+SP(REGS_B0+8),B0
0546     LDW .D2T1   *+SP(REGS_A4+8),A4
0547     LDW .D2T2   *+SP(REGS_B4+8),B4
0548     LDW .D2T1   *+SP(REGS_A6+8),A6
0549     LDW .D2T2   *+SP(REGS_B6+8),B6
0550     LDW .D2T1   *+SP(REGS_A8+8),A8
0551 #ifdef CONFIG_C6X_BIG_KERNEL
0552  || B   .S2 B3
0553 #else
0554  || B   .S2 system_call_saved_noack
0555 #endif
0556     LDW .D2T2   *+SP(REGS_B8+8),B8
0557     NOP 4
0558 ENDPROC(_nmi_handler)
0559 
0560     ;;
0561     ;; Jump to schedule() then return to ret_from_isr
0562     ;;
0563 #ifdef  CONFIG_PREEMPT
0564 resume_kernel:
0565     GET_THREAD_INFO A12
0566     LDW .D1T1   *+A12(THREAD_INFO_PREEMPT_COUNT),A1
0567     NOP 4
0568  [A1]   BNOP    .S2 restore_all,5
0569 
0570 preempt_schedule:
0571     GET_THREAD_INFO A2
0572     LDW .D1T1   *+A2(THREAD_INFO_FLAGS),A1
0573 #ifdef CONFIG_C6X_BIG_KERNEL
0574     MVKL    .S2 preempt_schedule_irq,B0
0575     MVKH    .S2 preempt_schedule_irq,B0
0576     NOP 2
0577 #else
0578     NOP 4
0579 #endif
0580     AND .D1 _TIF_NEED_RESCHED,A1,A1
0581  [!A1]  BNOP    .S2 restore_all,5
0582 #ifdef CONFIG_C6X_BIG_KERNEL
0583     B   .S2 B0
0584 #else
0585     B   .S2 preempt_schedule_irq
0586 #endif
0587     ADDKPC  .S2 preempt_schedule,B3,4
0588 #endif /* CONFIG_PREEMPT */
0589 
0590 ENTRY(enable_exception)
0591     DINT
0592     MVC .S2 TSR,B0
0593     MVC .S2 B3,NRP
0594     MVK .L2 0xc,B1
0595     OR  .D2 B0,B1,B0
0596     MVC .S2 B0,TSR          ;  Set GEE and XEN in TSR
0597     B   .S2 NRP
0598     NOP 5
0599 ENDPROC(enable_exception)
0600 
0601     ;;
0602     ;; Special system calls
0603     ;; return address is in B3
0604     ;;
0605 ENTRY(sys_rt_sigreturn)
0606     ADD .D1X    SP,8,A4
0607 #ifdef CONFIG_C6X_BIG_KERNEL
0608  || MVKL    .S1 do_rt_sigreturn,A0
0609     MVKH    .S1 do_rt_sigreturn,A0
0610     BNOP    .S2X    A0,5
0611 #else
0612  || B   .S2 do_rt_sigreturn
0613     NOP 5
0614 #endif
0615 ENDPROC(sys_rt_sigreturn)
0616 
0617 ENTRY(sys_pread_c6x)
0618     MV  .D2X    A8,B7
0619 #ifdef CONFIG_C6X_BIG_KERNEL
0620  || MVKL    .S1 sys_pread64,A0
0621     MVKH    .S1 sys_pread64,A0
0622     BNOP    .S2X    A0,5
0623 #else
0624  || B   .S2 sys_pread64
0625     NOP 5
0626 #endif
0627 ENDPROC(sys_pread_c6x)
0628 
0629 ENTRY(sys_pwrite_c6x)
0630     MV  .D2X    A8,B7
0631 #ifdef CONFIG_C6X_BIG_KERNEL
0632  || MVKL    .S1 sys_pwrite64,A0
0633     MVKH    .S1 sys_pwrite64,A0
0634     BNOP    .S2X    A0,5
0635 #else
0636  || B   .S2 sys_pwrite64
0637     NOP 5
0638 #endif
0639 ENDPROC(sys_pwrite_c6x)
0640 
0641 ;; On Entry
0642 ;;   A4 - path
0643 ;;   B4 - offset_lo (LE), offset_hi (BE)
0644 ;;   A6 - offset_lo (BE), offset_hi (LE)
0645 ENTRY(sys_truncate64_c6x)
0646 #ifdef CONFIG_CPU_BIG_ENDIAN
0647     MV  .S2 B4,B5
0648     MV  .D2X    A6,B4
0649 #else
0650     MV  .D2X    A6,B5
0651 #endif
0652 #ifdef CONFIG_C6X_BIG_KERNEL
0653  || MVKL    .S1 sys_truncate64,A0
0654     MVKH    .S1 sys_truncate64,A0
0655     BNOP    .S2X    A0,5
0656 #else
0657  || B   .S2 sys_truncate64
0658     NOP 5
0659 #endif
0660 ENDPROC(sys_truncate64_c6x)
0661 
0662 ;; On Entry
0663 ;;   A4 - fd
0664 ;;   B4 - offset_lo (LE), offset_hi (BE)
0665 ;;   A6 - offset_lo (BE), offset_hi (LE)
0666 ENTRY(sys_ftruncate64_c6x)
0667 #ifdef CONFIG_CPU_BIG_ENDIAN
0668     MV  .S2 B4,B5
0669     MV  .D2X    A6,B4
0670 #else
0671     MV  .D2X    A6,B5
0672 #endif
0673 #ifdef CONFIG_C6X_BIG_KERNEL
0674  || MVKL    .S1 sys_ftruncate64,A0
0675     MVKH    .S1 sys_ftruncate64,A0
0676     BNOP    .S2X    A0,5
0677 #else
0678  || B   .S2 sys_ftruncate64
0679     NOP 5
0680 #endif
0681 ENDPROC(sys_ftruncate64_c6x)
0682 
0683 ;; On Entry
0684 ;;   A4 - fd
0685 ;;   B4 - offset_lo (LE), offset_hi (BE)
0686 ;;   A6 - offset_lo (BE), offset_hi (LE)
0687 ;;   B6 - len_lo (LE), len_hi (BE)
0688 ;;   A8 - len_lo (BE), len_hi (LE)
0689 ;;   B8 - advice
0690 ENTRY(sys_fadvise64_64_c6x)
0691 #ifdef CONFIG_C6X_BIG_KERNEL
0692     MVKL    .S1 sys_fadvise64_64,A0
0693     MVKH    .S1 sys_fadvise64_64,A0
0694     BNOP    .S2X    A0,2
0695 #else
0696     B   .S2 sys_fadvise64_64
0697     NOP 2
0698 #endif
0699 #ifdef CONFIG_CPU_BIG_ENDIAN
0700     MV  .L2 B4,B5
0701  || MV  .D2X    A6,B4
0702     MV  .L1 A8,A6
0703  || MV  .D1X    B6,A7
0704 #else
0705     MV  .D2X    A6,B5
0706     MV  .L1 A8,A7
0707  || MV  .D1X    B6,A6
0708 #endif
0709     MV  .L2 B8,B6
0710 ENDPROC(sys_fadvise64_64_c6x)
0711 
0712 ;; On Entry
0713 ;;   A4 - fd
0714 ;;   B4 - mode
0715 ;;   A6 - offset_hi
0716 ;;   B6 - offset_lo
0717 ;;   A8 - len_hi
0718 ;;   B8 - len_lo
0719 ENTRY(sys_fallocate_c6x)
0720 #ifdef CONFIG_C6X_BIG_KERNEL
0721     MVKL    .S1 sys_fallocate,A0
0722     MVKH    .S1 sys_fallocate,A0
0723     BNOP    .S2X    A0,1
0724 #else
0725     B   .S2 sys_fallocate
0726     NOP
0727 #endif
0728     MV  .D1 A6,A7
0729     MV  .D1X    B6,A6
0730     MV  .D2X    A8,B7
0731     MV  .D2 B8,B6
0732 ENDPROC(sys_fallocate_c6x)
0733 
0734     ;; put this in .neardata for faster access when using DSBT mode
0735     .section .neardata,"aw",@progbits
0736     .global current_ksp
0737     .hidden current_ksp
0738 current_ksp:
0739     .word   init_thread_union + THREAD_START_SP