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0001 /* 
0002  * linux/arch/arm/boot/compressed/head-sa1100.S
0003  * 
0004  * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net>
0005  * 
0006  * SA1100 specific tweaks.  This is merged into head.S by the linker.
0007  *
0008  */
0009 
0010 #include <linux/linkage.h>
0011 #include <asm/mach-types.h>
0012 
0013         .section        ".start", "ax"
0014         .arch   armv4
0015 
0016 __SA1100_start:
0017 
0018         @ Preserve r8/r7 i.e. kernel entry values
0019 #ifdef CONFIG_SA1100_COLLIE
0020         mov r7, #MACH_TYPE_COLLIE
0021 #endif
0022 #ifdef CONFIG_SA1100_SIMPAD
0023         @ UNTIL we've something like an open bootldr
0024         mov r7, #MACH_TYPE_SIMPAD   @should be 87
0025 #endif
0026         mrc p15, 0, r0, c1, c0, 0   @ read control reg
0027         ands    r0, r0, #0x0d
0028         beq 99f
0029 
0030         @ Data cache might be active.
0031         @ Be sure to flush kernel binary out of the cache,
0032         @ whatever state it is, before it is turned off.
0033         @ This is done by fetching through currently executed
0034         @ memory to be sure we hit the same cache.
0035         bic r2, pc, #0x1f
0036         add r3, r2, #0x4000     @ 16 kb is quite enough...
0037 1:      ldr r0, [r2], #32
0038         teq r2, r3
0039         bne 1b
0040         mcr p15, 0, r0, c7, c10, 4  @ drain WB
0041         mcr p15, 0, r0, c7, c7, 0   @ flush I & D caches
0042 
0043         @ disabling MMU and caches
0044         mrc p15, 0, r0, c1, c0, 0   @ read control reg
0045         bic r0, r0, #0x0d       @ clear WB, DC, MMU
0046         bic r0, r0, #0x1000     @ clear Icache
0047         mcr p15, 0, r0, c1, c0, 0
0048 99: